Day 10

day10/Cargo.lock

@@ -0,0 +1,7 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "day10"
+version = "0.1.0"

day10/input.txt

@@ -0,0 +1,143 @@
+addx 2
+addx 3
+noop
+noop
+addx 1
+addx 5
+addx -1
+addx 5
+addx 1
+noop
+noop
+addx 4
+noop
+noop
+addx 5
+addx -5
+addx 6
+addx 3
+addx 1
+addx 5
+addx 1
+noop
+addx -38
+addx 41
+addx -22
+addx -14
+addx 7
+noop
+noop
+addx 3
+addx -2
+addx 2
+noop
+addx 17
+addx -12
+addx 5
+addx 2
+addx -16
+addx 17
+addx 2
+addx 5
+addx 2
+addx -30
+noop
+addx -6
+addx 1
+noop
+addx 5
+noop
+noop
+noop
+addx 5
+addx -12
+addx 17
+noop
+noop
+noop
+noop
+addx 5
+addx 10
+addx -9
+addx 2
+addx 5
+addx 2
+addx -5
+addx 6
+addx 4
+noop
+noop
+addx -37
+noop
+noop
+addx 17
+addx -12
+addx 30
+addx -23
+addx 2
+noop
+addx 3
+addx -17
+addx 22
+noop
+noop
+noop
+addx 5
+noop
+addx -10
+addx 11
+addx 4
+noop
+addx 5
+addx -2
+noop
+addx -6
+addx -29
+addx 37
+addx -30
+addx 27
+addx -2
+addx -22
+noop
+addx 3
+addx 2
+noop
+addx 7
+addx -2
+addx 2
+addx 5
+addx -5
+addx 6
+addx 2
+addx 2
+addx 5
+addx -25
+noop
+addx -10
+noop
+addx 1
+noop
+addx 2
+noop
+noop
+noop
+noop
+addx 7
+addx 1
+addx 4
+addx 1
+noop
+addx 2
+noop
+addx 3
+addx 5
+addx -1
+noop
+addx 3
+addx 5
+addx 2
+addx 1
+noop
+noop
+noop
+noop

day10/src/main.rs

@@ -1,3 +1,84 @@
-fn main() {
+use std::fs::read_to_string;
-    println!("Hello, world!");
+
+type Register = i32;
+
+enum Instruction {
+    Noop,
+    Addx(Register),
+    Addx2(Register),
+}
+
+impl From<&str> for Instruction {
+    fn from(value: &str) -> Self {
+        match &value.split_whitespace().collect::<Vec<_>>()[..] {
+            ["addx", v] => Self::Addx(v.parse::<Register>().unwrap()),
+            ["noop"] => Self::Noop,
+            _ => panic!("Invalid instruction"),
+        }
+    }
+}
+
+struct Cpu<T> {
+    instruction: Option<Instruction>,
+    x: Register,
+    instructions: T,
+}
+
+impl<T> Cpu<T> {
+    fn new(instructions: T) -> Self {
+        Self {
+            instruction: Some(Instruction::Noop),
+            x: 1,
+            instructions,
+        }
+    }
+}
+
+impl<T> Iterator for Cpu<T>
+where
+    T: Iterator<Item = Instruction>,
+{
+    type Item = Register;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        match self.instruction {
+            Some(Instruction::Noop) => self.instruction = self.instructions.next(),
+            Some(Instruction::Addx(v)) => self.instruction = Some(Instruction::Addx2(v)),
+            Some(Instruction::Addx2(v)) => {
+                self.x += v;
+                self.instruction = self.instructions.next()
+            }
+            None => return None,
+        }
+        Some(self.x)
+    }
+}
+
+fn main() {
+    let input = "addx 15\naddx -11\naddx 6\naddx -3\naddx 5\naddx -1\naddx -8\naddx 13\naddx 4\nnoop\naddx -1\naddx 5\naddx -1\naddx 5\naddx -1\naddx 5\naddx -1\naddx 5\naddx -1\naddx -35\naddx 1\naddx 24\naddx -19\naddx 1\naddx 16\naddx -11\nnoop\nnoop\naddx 21\naddx -15\nnoop\nnoop\naddx -3\naddx 9\naddx 1\naddx -3\naddx 8\naddx 1\naddx 5\nnoop\nnoop\nnoop\nnoop\nnoop\naddx -36\nnoop\naddx 1\naddx 7\nnoop\nnoop\nnoop\naddx 2\naddx 6\nnoop\nnoop\nnoop\nnoop\nnoop\naddx 1\nnoop\nnoop\naddx 7\naddx 1\nnoop\naddx -13\naddx 13\naddx 7\nnoop\naddx 1\naddx -33\nnoop\nnoop\nnoop\naddx 2\nnoop\nnoop\nnoop\naddx 8\nnoop\naddx -1\naddx 2\naddx 1\nnoop\naddx 17\naddx -9\naddx 1\naddx 1\naddx -3\naddx 11\nnoop\nnoop\naddx 1\nnoop\naddx 1\nnoop\nnoop\naddx -13\naddx -19\naddx 1\naddx 3\naddx 26\naddx -30\naddx 12\naddx -1\naddx 3\naddx 1\nnoop\nnoop\nnoop\naddx -9\naddx 18\naddx 1\naddx 2\nnoop\nnoop\naddx 9\nnoop\nnoop\nnoop\naddx -1\naddx 2\naddx -37\naddx 1\naddx 3\nnoop\naddx 15\naddx -21\naddx 22\naddx -6\naddx 1\nnoop\naddx 2\naddx 1\nnoop\naddx -10\nnoop\nnoop\naddx 20\naddx 1\naddx 2\naddx 2\naddx -6\naddx -11\nnoop\nnoop\nnoop";
+    let input = read_to_string("input.txt").unwrap_or_else(|_| input.to_owned());
+    let instructions = input.lines().map(Instruction::from);
+    let signal_strength: Register = Cpu::new(instructions)
+        .enumerate()
+        .map(|(i, x)| {
+            let i = i as Register;
+            let horizontal = i % 40;
+            print!(
+                "{}",
+                if (horizontal - x).abs() <= 1 {
+                    '█'
+                } else {
+                    ' '
+                }
+            );
+            if horizontal == 39 {
+                println!();
+            }
+            (i, x)
+        })
+        .skip(19)
+        .step_by(40)
+        .map(|(i, x)| (i + 1) * x)
+        .sum();
+    println!("signal strength: {signal_strength}");
 }