63 lines
1.7 KiB
Rust
63 lines
1.7 KiB
Rust
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#![allow(unused)]
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use crate::pac::crs::vals::Syncsrc;
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use crate::pac::{CRS, RCC};
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use crate::rcc::sealed::RccPeripheral;
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use crate::time::Hertz;
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/// HSI48 speed
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pub const HSI48_FREQ: Hertz = Hertz(48_000_000);
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/// Configuration for the HSI48 clock
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#[derive(Clone, Copy, Debug)]
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pub struct Hsi48Config {
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/// Enable CRS Sync from USB Start Of Frame (SOF) events.
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/// Required if HSI48 is going to be used as USB clock.
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///
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/// Other use cases of CRS are not supported yet.
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pub sync_from_usb: bool,
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}
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impl Default for Hsi48Config {
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fn default() -> Self {
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Self { sync_from_usb: false }
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}
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}
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pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz {
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// Enable VREFINT reference for HSI48 oscillator
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#[cfg(stm32l0)]
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crate::pac::SYSCFG.cfgr3().modify(|w| {
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w.set_enref_hsi48(true);
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w.set_en_vrefint(true);
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});
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// Enable HSI48
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#[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32u5, stm32wba, stm32f0)))]
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let r = RCC.crrcr();
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#[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32u5, stm32wba))]
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let r = RCC.cr();
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#[cfg(any(stm32f0))]
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let r = RCC.cr2();
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r.modify(|w| w.set_hsi48on(true));
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while r.read().hsi48rdy() == false {}
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if config.sync_from_usb {
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crate::peripherals::CRS::enable_and_reset();
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CRS.cfgr().modify(|w| {
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w.set_syncsrc(Syncsrc::USB);
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});
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// These are the correct settings for standard USB operation. If other settings
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// are needed there will need to be additional config options for the CRS.
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crate::pac::CRS.cr().modify(|w| {
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w.set_autotrimen(true);
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w.set_cen(true);
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});
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}
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HSI48_FREQ
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}
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