embassy/embassy-stm32f4/src/uarte.rs

340 lines
11 KiB
Rust
Raw Normal View History

2020-12-29 03:48:26 +01:00
//! Async low power UARTE.
2020-12-28 16:17:36 +01:00
//!
2020-12-29 03:48:26 +01:00
//! The peripheral is autmatically enabled and disabled as required to save power.
//! Lowest power consumption can only be guaranteed if the send receive futures
//! are dropped correctly (e.g. not using `mem::forget()`).
2020-12-28 16:17:36 +01:00
use core::cell::UnsafeCell;
use core::cmp::min;
2020-12-29 03:48:26 +01:00
use core::future::Future;
2020-12-28 16:17:36 +01:00
use core::marker::PhantomPinned;
use core::ops::Deref;
use core::pin::Pin;
use core::ptr;
use core::sync::atomic::{compiler_fence, Ordering};
use core::task::{Context, Poll};
2020-12-28 20:13:43 +01:00
use cortex_m::singleton;
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
use embassy::util::Signal;
use embedded_dma::{StaticReadBuffer, StaticWriteBuffer};
use crate::fmt::assert;
2020-12-28 20:13:43 +01:00
use crate::hal::dma::config::DmaConfig;
use crate::hal::dma::{Channel4, PeripheralToMemory, Stream2, StreamsTuple, Transfer};
2020-12-29 03:48:26 +01:00
use crate::hal::gpio::gpioa::{PA10, PA9};
2020-12-28 16:55:49 +01:00
use crate::hal::gpio::{Alternate, AF10, AF7, AF9};
2020-12-28 23:43:29 +01:00
use crate::hal::gpio::{Floating, Input, Output, PushPull};
2020-12-29 03:48:26 +01:00
use crate::hal::pac;
use crate::hal::prelude::*;
2020-12-28 23:43:29 +01:00
use crate::hal::rcc::Clocks;
use crate::hal::serial::config::{
Config as SerialConfig, DmaConfig as SerialDmaConfig, Parity, StopBits, WordLength,
2020-12-28 20:13:43 +01:00
};
2020-12-28 23:43:29 +01:00
use crate::hal::serial::Serial;
use crate::hal::time::Bps;
2020-12-28 20:13:43 +01:00
2020-12-28 16:17:36 +01:00
use crate::interrupt;
2020-12-29 03:48:26 +01:00
2020-12-28 23:43:29 +01:00
use crate::pac::Interrupt;
use crate::pac::{DMA2, USART1};
2020-12-28 16:55:49 +01:00
use embedded_hal::digital::v2::OutputPin;
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
// Re-export SVD variants to allow user to directly set values.
// pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
/// Interface to the UARTE peripheral
pub struct Uarte {
instance: Serial<USART1, (PA9<Alternate<AF7>>, PA10<Alternate<AF7>>)>,
usart: USART1,
dma: DMA2,
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
struct State {
tx_done: Signal<()>,
rx_done: Signal<u32>,
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
static STATE: State = State {
tx_done: Signal::new(),
rx_done: Signal::new(),
};
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
pub struct Pins {
pub rxd: PA10<Alternate<AF7>>,
pub txd: PA9<Alternate<AF7>>,
pub dma: DMA2,
pub usart: USART1,
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
impl Uarte {
pub fn new(mut pins: Pins, parity: Parity, baudrate: Bps, clocks: Clocks) -> Self {
// // Enable interrupts
// uarte.events_endtx.reset();
// uarte.events_endrx.reset();
// uarte
// .intenset
// .write(|w| w.endtx().set().txstopped().set().endrx().set().rxto().set());
// // TODO: Set interrupt priority?
// interrupt::unpend(interrupt::UARTE0_UART0);
// interrupt::enable(interrupt::UARTE0_UART0);
2020-12-28 16:17:36 +01:00
2020-12-28 16:55:49 +01:00
// Serial<USART1, (PA9<Alternate<AF7>>, PA10<Alternate<AF7>>)>
let mut serial = Serial::usart1(
2020-12-28 23:43:29 +01:00
pins.usart,
2020-12-28 16:55:49 +01:00
(pins.txd, pins.rxd),
2020-12-28 23:43:29 +01:00
SerialConfig {
baudrate: baudrate,
2020-12-28 16:55:49 +01:00
wordlength: WordLength::DataBits8,
parity: Parity::ParityNone,
stopbits: StopBits::STOP1,
2020-12-28 23:43:29 +01:00
dma: SerialDmaConfig::TxRx,
2020-12-28 16:55:49 +01:00
},
clocks,
)
.unwrap();
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
let isr = pins.dma.hisr;0
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
Uarte { instance: serial, dma: pins.dma, usart: pins.usart }
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
/// Sets the baudrate, parity and assigns the pins to the UARTE peripheral.
// TODO: Make it take the same `Pins` structs nrf-hal (with optional RTS/CTS).
// // TODO: #[cfg()] for smaller device variants without port register (nrf52810, ...).
// pub fn configure(
// &mut self,
// rxd: &Pin<Input<Floating>>,
// txd: &mut Pin<Output<PushPull>>,
// parity: Parity,
// baudrate: Baudrate,
// ) {
// let uarte = &self.instance;
// assert!(uarte.enable.read().enable().is_disabled());
//
// uarte.psel.rxd.write(|w| {
// let w = unsafe { w.pin().bits(rxd.pin()) };
// let w = w.port().bit(rxd.port().bit());
// w.connect().connected()
// });
//
// txd.set_high().unwrap();
// uarte.psel.txd.write(|w| {
// let w = unsafe { w.pin().bits(txd.pin()) };
// let w = w.port().bit(txd.port().bit());
// w.connect().connected()
// });
//
// uarte.baudrate.write(|w| w.baudrate().variant(baudrate));
// uarte.config.write(|w| w.parity().variant(parity));
// }
// fn enable(&mut self) {
// self.instance.enable.write(|w| w.enable().enabled());
// }
/// Sends serial data.
///
/// `tx_buffer` is marked as static as per `embedded-dma` requirements.
/// It it safe to use a buffer with a non static lifetime if memory is not
/// reused until the future has finished.
pub fn send<'a, B>(&'a mut self, tx_buffer: B) -> SendFuture<'a, B>
where
B: StaticReadBuffer<Word = u8>,
{
// Panic if TX is running which can happen if the user has called
// `mem::forget()` on a previous future after polling it once.
assert!(!self.tx_started());
self.enable();
SendFuture {
uarte: self,
buf: tx_buffer,
}
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
fn tx_started(&self) -> bool {
// self.instance.events_txstarted.read().bits() != 0
false
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
/// Receives serial data.
///
/// The future is pending until the buffer is completely filled.
/// A common pattern is to use [`stop()`](ReceiveFuture::stop) to cancel
/// unfinished transfers after a timeout to prevent lockup when no more data
/// is incoming.
///
/// `rx_buffer` is marked as static as per `embedded-dma` requirements.
/// It it safe to use a buffer with a non static lifetime if memory is not
/// reused until the future has finished.
pub fn receive<'a, B>(&'a mut self, rx_buffer: B) -> ReceiveFuture<'a, B>
where
B: StaticWriteBuffer<Word = u8>,
{
// Panic if RX is running which can happen if the user has called
// `mem::forget()` on a previous future after polling it once.
assert!(!self.rx_started());
self.enable();
ReceiveFuture {
uarte: self,
buf: Some(rx_buffer),
2020-12-28 16:17:36 +01:00
}
}
2020-12-29 03:48:26 +01:00
fn rx_started(&self) -> bool {
self.instance.events_rxstarted.read().bits() != 0
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
}
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
/// Future for the [`LowPowerUarte::send()`] method.
pub struct SendFuture<'a, B> {
uarte: &'a Uarte,
buf: B,
}
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
impl<'a, B> Drop for SendFuture<'a, B> {
fn drop(self: &mut Self) {
if self.uarte.tx_started() {
trace!("stoptx");
// Stop the transmitter to minimize the current consumption.
self.uarte
.instance
.tasks_stoptx
.write(|w| unsafe { w.bits(1) });
self.uarte.instance.events_txstarted.reset();
2020-12-28 16:17:36 +01:00
}
}
2020-12-29 03:48:26 +01:00
}
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
impl<'a, B> Future for SendFuture<'a, B>
where
B: StaticReadBuffer<Word = u8>,
{
type Output = ();
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<()> {
if self.is_ready() {
Poll::Ready(())
} else {
// Start DMA transaction
let uarte = &self.uarte.instance;
STATE.tx_done.reset();
let (ptr, len) = unsafe { self.buf.read_buffer() };
// assert!(len <= EASY_DMA_SIZE);
// TODO: panic if buffer is not in SRAM
compiler_fence(Ordering::SeqCst);
// uarte.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
// uarte
// .txd
// .maxcnt
// .write(|w| unsafe { w.maxcnt().bits(len as _) });
// Start the DMA transfer
// See https://github.com/mwkroening/async-stm32f1xx/blob/78c46d1bff124eae4ebc7a2f4d40e6ed74def8b5/src/serial.rs#L118-L129
// https://github.com/stm32-rs/stm32f1xx-hal/blob/68fd3d6f282173816fd3181e795988d314cb17d0/src/serial.rs#L649-L671
// let first_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
// let second_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
// let triple_buffer = Some(singleton!(: [u8; 128] = [0; 128]).unwrap());
let transfer = Transfer::init(
StreamsTuple::new(self.dma).2,
self.usart,
self.buf,
// Some(second_buffer),
None,
DmaConfig::default()
.transfer_complete_interrupt(true)
.memory_increment(true)
.double_buffer(false),
);
waker_interrupt!(DMA2_STREAM2, cx.waker().clone());
Poll::Pending
2020-12-28 16:17:36 +01:00
}
}
}
2020-12-29 03:48:26 +01:00
/// Future for the [`Uarte::receive()`] method.
pub struct ReceiveFuture<'a, B> {
uarte: &'a Uarte,
buf: Option<B>,
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
impl<'a, B> Drop for ReceiveFuture<'a, B> {
fn drop(self: &mut Self) {
if self.uarte.rx_started() {
trace!("stoprx");
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
self.uarte
.instance
.tasks_stoprx
.write(|w| unsafe { w.bits(1) });
self.uarte.instance.events_rxstarted.reset();
}
}
2020-12-28 16:17:36 +01:00
}
2020-12-29 03:48:26 +01:00
impl<'a, B> Future for ReceiveFuture<'a, B>
where
B: StaticWriteBuffer<Word = u8>,
{
type Output = B;
2020-12-28 16:17:36 +01:00
2020-12-29 03:48:26 +01:00
fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<B> {
if self.is_ready() {
Poll::Ready(())
} else {
// Start DMA transaction
compiler_fence(Ordering::SeqCst);
// uarte.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
// uarte
// .txd
// .maxcnt
// .write(|w| unsafe { w.maxcnt().bits(len as _) });
// Start the DMA transfer
// See https://github.com/mwkroening/async-stm32f1xx/blob/78c46d1bff124eae4ebc7a2f4d40e6ed74def8b5/src/serial.rs#L118-L129
// https://github.com/stm32-rs/stm32f1xx-hal/blob/68fd3d6f282173816fd3181e795988d314cb17d0/src/serial.rs#L649-L671
// let first_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
// let second_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
// let triple_buffer = Some(singleton!(: [u8; 128] = [0; 128]).unwrap());
let transfer = Transfer::init(
StreamsTuple::new(self.dma).7,
self.usart,
self.buf,
// Some(second_buffer),
None,
DmaConfig::default()
.transfer_complete_interrupt(true)
.memory_increment(true)
.double_buffer(false),
);
waker_interrupt!(DMA2_STREAM7, cx.waker().clone());
Poll::Pending
}
2020-12-28 16:17:36 +01:00
}
}
2020-12-29 03:48:26 +01:00
/// Future for the [`receive()`] method.
impl<'a, B> ReceiveFuture<'a, B> {
/// Stops the ongoing reception and returns the number of bytes received.
pub async fn stop(mut self) -> (B, usize) {
let buf = self.buf.take().unwrap();
drop(self);
let len = STATE.rx_done.wait().await;
(buf, len as _)
2020-12-28 16:17:36 +01:00
}
}