191 lines
4.9 KiB
Rust
191 lines
4.9 KiB
Rust
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use core::slice;
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use cyw43::SpiBusCyw43;
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use embassy_rp::dma::Channel;
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use embassy_rp::gpio::{Pin, Pull};
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use embassy_rp::pio::{PioStateMachine, ShiftDirection};
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use embassy_rp::relocate::RelocatedProgram;
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use embassy_rp::{pio_instr_util, Peripheral};
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use embedded_hal_1::spi::ErrorType;
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use embedded_hal_async::spi::SpiBusFlush;
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use pio::Wrap;
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use pio_proc::pio_asm;
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pub struct PioSpi<SM, DMA> {
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// cs: Output<'static, AnyPin>,
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sm: SM,
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dma: DMA,
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wrap_target: u8,
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}
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impl<SM, DMA> PioSpi<SM, DMA>
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where
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SM: PioStateMachine,
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DMA: Channel,
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{
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pub fn new<DIO, CLK>(
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mut sm: SM,
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// cs: AnyPin,
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dio: DIO,
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clk: CLK,
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dma: DMA,
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) -> Self
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where
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DIO: Pin,
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CLK: Pin,
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{
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let program = pio_asm!(
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".side_set 1"
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// "set pindirs, 1 side 0"
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// "set pins, 0 side 0"
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".wrap_target"
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"lp:",
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"out pins, 1 side 0"
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"jmp x-- lp side 1"
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"set pindirs, 0 side 0"
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// "nop side 1"
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"lp2:"
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"in pins, 1 side 0"
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"jmp y-- lp2 side 1"
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".wrap"
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);
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let relocated = RelocatedProgram::new(&program.program);
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let mut pin_io = sm.make_pio_pin(dio);
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pin_io.set_pull(Pull::Down);
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pin_io.set_schmitt(true);
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let pin_clk = sm.make_pio_pin(clk);
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sm.write_instr(relocated.origin() as usize, relocated.code());
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// 16 Mhz
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sm.set_clkdiv(0x07d0);
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// 8Mhz
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sm.set_clkdiv(0x0a_00);
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// 1Mhz
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// sm.set_clkdiv(0x7d_00);
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// slowest possible
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// sm.set_clkdiv(0xffff_00);
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sm.set_autopull(true);
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// sm.set_pull_threshold(32);
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sm.set_autopush(true);
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// sm.set_push_threshold(32);
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sm.set_out_pins(&[&pin_io]);
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sm.set_in_base_pin(&pin_io);
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sm.set_set_pins(&[&pin_clk]);
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pio_instr_util::set_pindir(&mut sm, 0b1);
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sm.set_set_pins(&[&pin_io]);
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pio_instr_util::set_pindir(&mut sm, 0b1);
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sm.set_sideset_base_pin(&pin_clk);
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sm.set_sideset_count(1);
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sm.set_out_shift_dir(ShiftDirection::Left);
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sm.set_in_shift_dir(ShiftDirection::Left);
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let Wrap { source, target } = relocated.wrap();
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sm.set_wrap(source, target);
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// pull low for startup
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pio_instr_util::set_pin(&mut sm, 0);
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Self {
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// cs: Output::new(cs, Level::High),
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sm,
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dma,
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wrap_target: target,
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}
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}
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pub async fn write(&mut self, write: &[u32]) {
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let write_bits = write.len() * 32 - 1;
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let read_bits = 31;
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defmt::trace!("write={} read={}", write_bits, read_bits);
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let mut dma = Peripheral::into_ref(&mut self.dma);
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pio_instr_util::set_x(&mut self.sm, write_bits as u32);
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pio_instr_util::set_y(&mut self.sm, read_bits as u32);
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pio_instr_util::set_pindir(&mut self.sm, 0b1);
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pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
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self.sm.set_enable(true);
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self.sm.dma_push(dma.reborrow(), write).await;
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let mut status = 0;
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self.sm.dma_pull(dma, slice::from_mut(&mut status)).await;
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defmt::trace!("{:#08x}", status);
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self.sm.set_enable(false);
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}
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pub async fn cmd_read(&mut self, cmd: u32, read: &mut [u32]) {
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let write_bits = 31;
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let read_bits = read.len() * 32 - 1;
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defmt::trace!("write={} read={}", write_bits, read_bits);
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let mut dma = Peripheral::into_ref(&mut self.dma);
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pio_instr_util::set_y(&mut self.sm, read_bits as u32);
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pio_instr_util::set_x(&mut self.sm, write_bits as u32);
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pio_instr_util::set_pindir(&mut self.sm, 0b1);
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pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
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// self.cs.set_low();
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self.sm.set_enable(true);
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self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await;
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self.sm.dma_pull(dma, read).await;
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self.sm.set_enable(false);
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}
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}
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#[derive(Debug)]
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pub enum PioError {}
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impl embedded_hal_async::spi::Error for PioError {
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fn kind(&self) -> embedded_hal_1::spi::ErrorKind {
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embedded_hal_1::spi::ErrorKind::Other
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}
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}
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impl<SM, DMA> ErrorType for PioSpi<SM, DMA>
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where
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SM: PioStateMachine,
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{
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type Error = PioError;
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}
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impl<SM, DMA> SpiBusFlush for PioSpi<SM, DMA>
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where
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SM: PioStateMachine,
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{
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async fn flush(&mut self) -> Result<(), Self::Error> {
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Ok(())
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}
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}
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impl<SM, DMA> SpiBusCyw43<u32> for PioSpi<SM, DMA>
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where
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SM: PioStateMachine,
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DMA: Channel,
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{
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async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> {
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self.write(write).await;
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Ok(())
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}
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async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> {
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self.cmd_read(write[0], read).await;
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Ok(())
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}
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}
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