2023-07-28 11:37:38 +02:00
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//! This example shows how to use the PIO module in the RP2040 chip to implement a duplex UART.
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//! The PIO module is a very powerful peripheral that can be used to implement many different
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//! protocols. It is a very flexible state machine that can be programmed to do almost anything.
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2023-07-24 22:20:00 +02:00
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//!
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2023-07-28 11:37:38 +02:00
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//! This example opens up a USB device that implements a CDC ACM serial port. It then uses the
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//! PIO module to implement a UART that is connected to the USB serial port. This allows you to
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//! communicate with a device connected to the RP2040 over USB serial.
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2023-07-24 22:20:00 +02:00
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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2023-07-28 11:37:38 +02:00
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#![feature(async_fn_in_trait)]
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2023-07-24 22:20:00 +02:00
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2023-07-28 11:37:38 +02:00
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use defmt::{info, panic, trace};
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2023-07-24 22:20:00 +02:00
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use embassy_executor::Spawner;
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2023-07-28 11:37:38 +02:00
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use embassy_futures::join::{join, join3};
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2023-07-24 22:20:00 +02:00
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use embassy_rp::bind_interrupts;
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use embassy_rp::peripherals::{PIO0, USB};
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2023-07-28 11:37:38 +02:00
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use embassy_rp::pio::InterruptHandler as PioInterruptHandler;
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2023-07-24 22:20:00 +02:00
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use embassy_rp::usb::{Driver, Instance, InterruptHandler};
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2023-07-28 11:37:38 +02:00
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use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex;
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2023-07-28 12:56:31 +02:00
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use embassy_sync::pipe::Pipe;
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2023-07-28 11:37:38 +02:00
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use embassy_usb::class::cdc_acm::{CdcAcmClass, Receiver, Sender, State};
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2023-07-24 22:20:00 +02:00
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use embassy_usb::driver::EndpointError;
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use embassy_usb::{Builder, Config};
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2023-07-28 11:37:38 +02:00
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use embedded_io::asynch::{Read, Write};
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2023-07-24 22:20:00 +02:00
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use {defmt_rtt as _, panic_probe as _};
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2023-07-28 11:37:38 +02:00
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use crate::uart::PioUart;
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use crate::uart_rx::PioUartRx;
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use crate::uart_tx::PioUartTx;
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2023-07-28 12:56:31 +02:00
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bind_interrupts!(struct Irqs {
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2023-07-24 22:20:00 +02:00
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USBCTRL_IRQ => InterruptHandler<USB>;
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PIO0_IRQ_0 => PioInterruptHandler<PIO0>;
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});
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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info!("Hello there!");
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let p = embassy_rp::init(Default::default());
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// Create the driver, from the HAL.
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2023-07-28 12:56:31 +02:00
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let driver = Driver::new(p.USB, Irqs);
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2023-07-24 22:20:00 +02:00
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// Create embassy-usb Config
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let mut config = Config::new(0xc0de, 0xcafe);
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config.manufacturer = Some("Embassy");
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config.product = Some("PIO UART example");
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config.serial_number = Some("12345678");
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config.max_power = 100;
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config.max_packet_size_0 = 64;
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// Required for windows compatibility.
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// https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/kconfig/CONFIG_CDC_ACM_IAD.html#help
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config.device_class = 0xEF;
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config.device_sub_class = 0x02;
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config.device_protocol = 0x01;
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config.composite_with_iads = true;
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// Create embassy-usb DeviceBuilder using the driver and config.
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// It needs some buffers for building the descriptors.
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let mut device_descriptor = [0; 256];
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let mut config_descriptor = [0; 256];
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let mut bos_descriptor = [0; 256];
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let mut control_buf = [0; 64];
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let mut state = State::new();
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let mut builder = Builder::new(
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driver,
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config,
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&mut device_descriptor,
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&mut config_descriptor,
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&mut bos_descriptor,
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&mut control_buf,
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);
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// Create classes on the builder.
|
2023-07-28 11:37:38 +02:00
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let class = CdcAcmClass::new(&mut builder, &mut state, 64);
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2023-07-24 22:20:00 +02:00
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// Build the builder.
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let mut usb = builder.build();
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// Run the USB device.
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let usb_fut = usb.run();
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2023-07-28 11:37:38 +02:00
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// PIO UART setup
|
2023-07-28 12:56:31 +02:00
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let uart = PioUart::new(9600, p.PIO0, p.PIN_4, p.PIN_5);
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2023-07-28 11:37:38 +02:00
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let (mut uart_tx, mut uart_rx) = uart.split();
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2023-07-28 12:56:31 +02:00
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// Pipe setup
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static USB_PIPE: Pipe<ThreadModeRawMutex, 20> = Pipe::new();
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let mut usb_pipe_writer = USB_PIPE.writer();
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let mut usb_pipe_reader = USB_PIPE.reader();
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2023-07-28 11:37:38 +02:00
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2023-07-28 12:56:31 +02:00
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static UART_PIPE: Pipe<ThreadModeRawMutex, 20> = Pipe::new();
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let mut uart_pipe_writer = UART_PIPE.writer();
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let mut uart_pipe_reader = UART_PIPE.reader();
|
2023-07-28 11:37:38 +02:00
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let (mut usb_tx, mut usb_rx) = class.split();
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// Read + write from USB
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let usb_future = async {
|
2023-07-24 22:20:00 +02:00
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loop {
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2023-07-28 11:37:38 +02:00
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|
info!("Wait for USB connection");
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usb_rx.wait_connection().await;
|
2023-07-24 22:20:00 +02:00
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info!("Connected");
|
2023-07-28 11:37:38 +02:00
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|
let _ = join(
|
2023-07-28 12:56:31 +02:00
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usb_read(&mut usb_rx, &mut uart_pipe_writer),
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usb_write(&mut usb_tx, &mut usb_pipe_reader),
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2023-07-28 11:37:38 +02:00
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)
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.await;
|
2023-07-24 22:20:00 +02:00
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|
info!("Disconnected");
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|
|
}
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|
|
};
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|
2023-07-28 11:37:38 +02:00
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|
// Read + write from UART
|
2023-07-28 12:56:31 +02:00
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|
let uart_future = join(
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uart_read(&mut uart_rx, &mut usb_pipe_writer),
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uart_write(&mut uart_tx, &mut uart_pipe_reader),
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);
|
2023-07-28 11:37:38 +02:00
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|
2023-07-24 22:20:00 +02:00
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|
// Run everything concurrently.
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|
// If we had made everything `'static` above instead, we could do this using separate tasks instead.
|
2023-07-28 11:37:38 +02:00
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|
join3(usb_fut, usb_future, uart_future).await;
|
2023-07-24 22:20:00 +02:00
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|
|
}
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|
struct Disconnected {}
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|
impl From<EndpointError> for Disconnected {
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|
fn from(val: EndpointError) -> Self {
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|
|
match val {
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|
|
EndpointError::BufferOverflow => panic!("Buffer overflow"),
|
|
|
|
EndpointError::Disabled => Disconnected {},
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|
|
|
}
|
|
|
|
}
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|
|
|
}
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|
2023-07-28 12:56:31 +02:00
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|
|
/// Read from the USB and write it to the UART TX pipe
|
2023-07-28 11:37:38 +02:00
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|
|
async fn usb_read<'d, T: Instance + 'd>(
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|
|
usb_rx: &mut Receiver<'d, Driver<'d, T>>,
|
2023-07-28 12:56:31 +02:00
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|
|
uart_pipe_writer: &mut embassy_sync::pipe::Writer<'static, ThreadModeRawMutex, 20>,
|
2023-07-28 11:37:38 +02:00
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|
) -> Result<(), Disconnected> {
|
2023-07-24 22:20:00 +02:00
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|
let mut buf = [0; 64];
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|
|
loop {
|
2023-07-28 11:37:38 +02:00
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|
let n = usb_rx.read_packet(&mut buf).await?;
|
2023-07-24 22:20:00 +02:00
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|
|
let data = &buf[..n];
|
2023-07-28 11:37:38 +02:00
|
|
|
trace!("USB IN: {:x}", data);
|
2023-07-28 12:56:31 +02:00
|
|
|
uart_pipe_writer.write(data).await;
|
2023-07-28 11:37:38 +02:00
|
|
|
}
|
|
|
|
}
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|
2023-07-28 12:56:31 +02:00
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|
|
/// Read from the USB TX pipe and write it to the USB
|
2023-07-28 11:37:38 +02:00
|
|
|
async fn usb_write<'d, T: Instance + 'd>(
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|
|
usb_tx: &mut Sender<'d, Driver<'d, T>>,
|
2023-07-28 12:56:31 +02:00
|
|
|
usb_pipe_reader: &mut embassy_sync::pipe::Reader<'d, ThreadModeRawMutex, 20>,
|
2023-07-28 11:37:38 +02:00
|
|
|
) -> Result<(), Disconnected> {
|
2023-07-28 12:56:31 +02:00
|
|
|
let mut buf = [0; 64];
|
2023-07-28 11:37:38 +02:00
|
|
|
loop {
|
2023-07-28 12:56:31 +02:00
|
|
|
let n = usb_pipe_reader.read(&mut buf).await;
|
|
|
|
let data = &buf[..n];
|
2023-07-28 11:37:38 +02:00
|
|
|
trace!("USB OUT: {:x}", data);
|
|
|
|
usb_tx.write_packet(&data).await?;
|
|
|
|
}
|
|
|
|
}
|
|
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|
|
2023-07-28 12:56:31 +02:00
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|
|
/// Read from the UART and write it to the USB TX pipe
|
2023-07-28 11:37:38 +02:00
|
|
|
async fn uart_read<'a>(
|
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|
|
uart_rx: &mut PioUartRx<'a>,
|
2023-07-28 12:56:31 +02:00
|
|
|
usb_pipe_writer: &mut embassy_sync::pipe::Writer<'static, ThreadModeRawMutex, 20>,
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|
|
) -> ! {
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|
|
|
let mut buf = [0; 64];
|
2023-07-28 11:37:38 +02:00
|
|
|
loop {
|
|
|
|
let n = uart_rx.read(&mut buf).await.expect("UART read error");
|
|
|
|
if n == 0 {
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|
|
|
continue;
|
|
|
|
}
|
2023-07-28 12:56:31 +02:00
|
|
|
let data = &buf[..n];
|
2023-07-28 11:37:38 +02:00
|
|
|
trace!("UART IN: {:x}", buf);
|
2023-07-28 12:56:31 +02:00
|
|
|
usb_pipe_writer.write(data).await;
|
2023-07-28 11:37:38 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-07-28 12:56:31 +02:00
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|
|
/// Read from the UART TX pipe and write it to the UART
|
2023-07-28 11:37:38 +02:00
|
|
|
async fn uart_write<'a>(
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|
|
uart_tx: &mut PioUartTx<'a>,
|
2023-07-28 12:56:31 +02:00
|
|
|
uart_pipe_reader: &mut embassy_sync::pipe::Reader<'a, ThreadModeRawMutex, 20>,
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|
|
|
) -> ! {
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|
|
|
let mut buf = [0; 64];
|
2023-07-28 11:37:38 +02:00
|
|
|
loop {
|
2023-07-28 12:56:31 +02:00
|
|
|
let n = uart_pipe_reader.read(&mut buf).await;
|
|
|
|
let data = &buf[..n];
|
2023-07-28 11:37:38 +02:00
|
|
|
trace!("UART OUT: {:x}", data);
|
|
|
|
let _ = uart_tx.write(&data).await;
|
2023-07-24 22:20:00 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
mod uart {
|
|
|
|
use embassy_rp::peripherals::PIO0;
|
2023-07-28 11:37:38 +02:00
|
|
|
use embassy_rp::pio::{Pio, PioPin};
|
2023-07-24 22:20:00 +02:00
|
|
|
use embassy_rp::Peripheral;
|
|
|
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|
2023-07-28 11:37:38 +02:00
|
|
|
use crate::uart_rx::PioUartRx;
|
|
|
|
use crate::uart_tx::PioUartTx;
|
2023-07-28 12:56:31 +02:00
|
|
|
use crate::Irqs;
|
2023-07-24 22:20:00 +02:00
|
|
|
|
|
|
|
pub struct PioUart<'a> {
|
2023-07-28 11:37:38 +02:00
|
|
|
tx: PioUartTx<'a>,
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|
|
rx: PioUartRx<'a>,
|
2023-07-24 22:20:00 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
impl<'a> PioUart<'a> {
|
2023-07-28 12:56:31 +02:00
|
|
|
pub fn new(
|
2023-07-24 22:20:00 +02:00
|
|
|
baud: u64,
|
|
|
|
pio: impl Peripheral<P = PIO0> + 'a,
|
|
|
|
tx_pin: impl PioPin,
|
|
|
|
rx_pin: impl PioPin,
|
|
|
|
) -> PioUart<'a> {
|
|
|
|
let Pio {
|
2023-07-28 11:37:38 +02:00
|
|
|
mut common, sm0, sm1, ..
|
2023-07-28 12:56:31 +02:00
|
|
|
} = Pio::new(pio, Irqs);
|
2023-07-24 22:20:00 +02:00
|
|
|
|
2023-07-28 11:37:38 +02:00
|
|
|
let (tx, origin) = PioUartTx::new(&mut common, sm0, tx_pin, baud, None);
|
|
|
|
let (rx, _) = PioUartRx::new(&mut common, sm1, rx_pin, baud, Some(origin));
|
2023-07-24 22:20:00 +02:00
|
|
|
|
2023-07-28 11:37:38 +02:00
|
|
|
PioUart { tx, rx }
|
|
|
|
}
|
|
|
|
|
|
|
|
pub fn split(self) -> (PioUartTx<'a>, PioUartRx<'a>) {
|
|
|
|
(self.tx, self.rx)
|
|
|
|
}
|
|
|
|
}
|
2023-07-24 22:20:00 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
mod uart_tx {
|
2023-07-28 12:56:31 +02:00
|
|
|
use core::convert::Infallible;
|
|
|
|
|
2023-07-24 22:20:00 +02:00
|
|
|
use embassy_rp::gpio::Level;
|
|
|
|
use embassy_rp::peripherals::PIO0;
|
|
|
|
use embassy_rp::pio::{Common, Config, Direction, FifoJoin, PioPin, ShiftDirection, StateMachine};
|
|
|
|
use embassy_rp::relocate::RelocatedProgram;
|
2023-07-28 11:37:38 +02:00
|
|
|
use embedded_io::asynch::Write;
|
|
|
|
use embedded_io::Io;
|
2023-07-24 22:20:00 +02:00
|
|
|
use fixed::traits::ToFixed;
|
|
|
|
use fixed_macro::types::U56F8;
|
|
|
|
|
2023-07-28 11:37:38 +02:00
|
|
|
pub struct PioUartTx<'a> {
|
|
|
|
sm_tx: StateMachine<'a, PIO0, 0>,
|
|
|
|
}
|
|
|
|
|
|
|
|
impl<'a> PioUartTx<'a> {
|
|
|
|
pub fn new(
|
|
|
|
common: &mut Common<'a, PIO0>,
|
|
|
|
mut sm_tx: StateMachine<'a, PIO0, 0>,
|
|
|
|
tx_pin: impl PioPin,
|
|
|
|
baud: u64,
|
|
|
|
origin: Option<u8>,
|
|
|
|
) -> (Self, u8) {
|
|
|
|
let mut prg = pio_proc::pio_asm!(
|
|
|
|
r#"
|
2023-07-24 22:20:00 +02:00
|
|
|
.side_set 1 opt
|
|
|
|
|
|
|
|
; An 8n1 UART transmit program.
|
|
|
|
; OUT pin 0 and side-set pin 0 are both mapped to UART TX pin.
|
|
|
|
|
|
|
|
pull side 1 [7] ; Assert stop bit, or stall with line in idle state
|
|
|
|
set x, 7 side 0 [7] ; Preload bit counter, assert start bit for 8 clocks
|
|
|
|
bitloop: ; This loop will run 8 times (8n1 UART)
|
|
|
|
out pins, 1 ; Shift 1 bit from OSR to the first OUT pin
|
|
|
|
jmp x-- bitloop [6] ; Each loop iteration is 8 cycles.
|
|
|
|
"#
|
2023-07-28 11:37:38 +02:00
|
|
|
);
|
|
|
|
prg.program.origin = origin;
|
|
|
|
let tx_pin = common.make_pio_pin(tx_pin);
|
|
|
|
sm_tx.set_pins(Level::High, &[&tx_pin]);
|
|
|
|
sm_tx.set_pin_dirs(Direction::Out, &[&tx_pin]);
|
|
|
|
|
|
|
|
let relocated = RelocatedProgram::new(&prg.program);
|
|
|
|
|
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let mut cfg = Config::default();
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cfg.set_out_pins(&[&tx_pin]);
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cfg.use_program(&common.load_program(&relocated), &[&tx_pin]);
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cfg.shift_out.auto_fill = false;
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cfg.shift_out.direction = ShiftDirection::Right;
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cfg.fifo_join = FifoJoin::TxOnly;
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cfg.clock_divider = (U56F8!(125_000_000) / (8 * baud)).to_fixed();
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sm_tx.set_config(&cfg);
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sm_tx.set_enable(true);
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// The 4 state machines of the PIO each have their own program counter that starts taking
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// instructions at an offset (origin) of the 32 instruction "space" the PIO device has.
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// It is up to the programmer to sort out where to place these instructions.
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// From the pio_asm! macro you get a ProgramWithDefines which has a field .program.origin
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// which takes an Option<u8>.
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//
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// When you load more than one RelocatedProgram into the PIO,
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// you load your first program at origin = 0.
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// The RelocatedProgram has .code().count() which returns a usize,
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// for which you can then use as your next program's origin.
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let offset = relocated.code().count() as u8 + origin.unwrap_or_default();
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(Self { sm_tx }, offset)
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}
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pub async fn write_u8(&mut self, data: u8) {
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|
self.sm_tx.tx().wait_push(data as u32).await;
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|
}
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|
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}
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|
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impl Io for PioUartTx<'_> {
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2023-07-28 12:56:31 +02:00
|
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type Error = Infallible;
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2023-07-28 11:37:38 +02:00
|
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}
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|
|
|
|
impl Write for PioUartTx<'_> {
|
2023-07-28 12:56:31 +02:00
|
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|
async fn write(&mut self, buf: &[u8]) -> Result<usize, Infallible> {
|
2023-07-28 11:37:38 +02:00
|
|
|
for byte in buf {
|
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|
|
self.write_u8(*byte).await;
|
|
|
|
}
|
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|
|
Ok(buf.len())
|
|
|
|
}
|
2023-07-24 22:20:00 +02:00
|
|
|
}
|
|
|
|
}
|
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|
|
|
|
mod uart_rx {
|
2023-07-28 12:56:31 +02:00
|
|
|
use core::convert::Infallible;
|
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|
|
|
2023-07-24 22:20:00 +02:00
|
|
|
use embassy_rp::gpio::Level;
|
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|
|
use embassy_rp::peripherals::PIO0;
|
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|
|
use embassy_rp::pio::{Common, Config, Direction, FifoJoin, PioPin, ShiftDirection, StateMachine};
|
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|
|
use embassy_rp::relocate::RelocatedProgram;
|
2023-07-28 11:37:38 +02:00
|
|
|
use embedded_io::asynch::Read;
|
|
|
|
use embedded_io::Io;
|
2023-07-24 22:20:00 +02:00
|
|
|
use fixed::traits::ToFixed;
|
|
|
|
use fixed_macro::types::U56F8;
|
|
|
|
|
2023-07-28 11:37:38 +02:00
|
|
|
pub struct PioUartRx<'a> {
|
|
|
|
sm_rx: StateMachine<'a, PIO0, 1>,
|
|
|
|
}
|
2023-07-24 22:20:00 +02:00
|
|
|
|
2023-07-28 11:37:38 +02:00
|
|
|
impl<'a> PioUartRx<'a> {
|
|
|
|
pub fn new(
|
|
|
|
common: &mut Common<'a, PIO0>,
|
|
|
|
mut sm_rx: StateMachine<'a, PIO0, 1>,
|
|
|
|
rx_pin: impl PioPin,
|
|
|
|
baud: u64,
|
|
|
|
origin: Option<u8>,
|
|
|
|
) -> (Self, u8) {
|
|
|
|
let mut prg = pio_proc::pio_asm!(
|
|
|
|
r#"
|
2023-07-24 22:20:00 +02:00
|
|
|
; Slightly more fleshed-out 8n1 UART receiver which handles framing errors and
|
|
|
|
; break conditions more gracefully.
|
|
|
|
; IN pin 0 and JMP pin are both mapped to the GPIO used as UART RX.
|
|
|
|
|
|
|
|
start:
|
|
|
|
wait 0 pin 0 ; Stall until start bit is asserted
|
|
|
|
set x, 7 [10] ; Preload bit counter, then delay until halfway through
|
2023-07-28 11:37:38 +02:00
|
|
|
rx_bitloop: ; the first data bit (12 cycles incl wait, set).
|
2023-07-24 22:20:00 +02:00
|
|
|
in pins, 1 ; Shift data bit into ISR
|
2023-07-28 11:37:38 +02:00
|
|
|
jmp x-- rx_bitloop [6] ; Loop 8 times, each loop iteration is 8 cycles
|
|
|
|
jmp pin good_rx_stop ; Check stop bit (should be high)
|
2023-07-24 22:20:00 +02:00
|
|
|
|
|
|
|
irq 4 rel ; Either a framing error or a break. Set a sticky flag,
|
|
|
|
wait 1 pin 0 ; and wait for line to return to idle state.
|
|
|
|
jmp start ; Don't push data if we didn't see good framing.
|
|
|
|
|
2023-07-28 11:37:38 +02:00
|
|
|
good_rx_stop: ; No delay before returning to start; a little slack is
|
2023-07-24 22:20:00 +02:00
|
|
|
push ; important in case the TX clock is slightly too fast.
|
|
|
|
"#
|
2023-07-28 11:37:38 +02:00
|
|
|
);
|
|
|
|
prg.program.origin = origin;
|
|
|
|
let relocated = RelocatedProgram::new(&prg.program);
|
|
|
|
let mut cfg = Config::default();
|
|
|
|
cfg.use_program(&common.load_program(&relocated), &[]);
|
|
|
|
|
|
|
|
let rx_pin = common.make_pio_pin(rx_pin);
|
|
|
|
sm_rx.set_pins(Level::High, &[&rx_pin]);
|
|
|
|
cfg.set_in_pins(&[&rx_pin]);
|
|
|
|
cfg.set_jmp_pin(&rx_pin);
|
|
|
|
sm_rx.set_pin_dirs(Direction::In, &[&rx_pin]);
|
|
|
|
|
|
|
|
cfg.clock_divider = (U56F8!(125_000_000) / (8 * baud)).to_fixed();
|
|
|
|
cfg.shift_out.auto_fill = false;
|
|
|
|
cfg.shift_out.direction = ShiftDirection::Right;
|
|
|
|
cfg.fifo_join = FifoJoin::RxOnly;
|
|
|
|
sm_rx.set_config(&cfg);
|
|
|
|
sm_rx.set_enable(true);
|
|
|
|
|
|
|
|
let offset = relocated.code().count() as u8 + origin.unwrap_or_default();
|
|
|
|
(Self { sm_rx }, offset)
|
|
|
|
}
|
|
|
|
|
|
|
|
pub async fn read_u8(&mut self) -> u8 {
|
|
|
|
self.sm_rx.rx().wait_pull().await as u8
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Io for PioUartRx<'_> {
|
2023-07-28 12:56:31 +02:00
|
|
|
type Error = Infallible;
|
2023-07-28 11:37:38 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
impl Read for PioUartRx<'_> {
|
2023-07-28 12:56:31 +02:00
|
|
|
async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Infallible> {
|
2023-07-28 11:37:38 +02:00
|
|
|
let mut i = 0;
|
|
|
|
while i < buf.len() {
|
|
|
|
buf[i] = self.read_u8().await;
|
|
|
|
i += 1;
|
|
|
|
}
|
|
|
|
Ok(i)
|
|
|
|
}
|
2023-07-24 22:20:00 +02:00
|
|
|
}
|
|
|
|
}
|