2021-12-08 05:43:39 +01:00
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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2023-05-30 00:10:36 +02:00
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#[path = "../common.rs"]
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mod common;
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2021-12-08 05:43:39 +01:00
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2023-05-30 00:10:36 +02:00
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use common::*;
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2021-12-08 05:43:39 +01:00
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use defmt::assert_eq;
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2022-08-17 23:40:16 +02:00
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use embassy_executor::Spawner;
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2023-05-01 18:17:29 +02:00
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use embassy_futures::join::join;
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2021-12-08 05:43:39 +01:00
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use embassy_stm32::usart::{Config, Uart};
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2023-05-25 00:29:56 +02:00
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use embassy_stm32::{bind_interrupts, peripherals, usart};
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2021-12-08 05:43:39 +01:00
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2023-05-25 00:29:56 +02:00
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#[cfg(any(
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feature = "stm32f103c8",
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feature = "stm32g491re",
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feature = "stm32g071rb",
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feature = "stm32h755zi",
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feature = "stm32c031c6",
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))]
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bind_interrupts!(struct Irqs {
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USART1 => usart::InterruptHandler<peripherals::USART1>;
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});
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#[cfg(feature = "stm32u585ai")]
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bind_interrupts!(struct Irqs {
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USART3 => usart::InterruptHandler<peripherals::USART3>;
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});
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#[cfg(feature = "stm32f429zi")]
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bind_interrupts!(struct Irqs {
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USART6 => usart::InterruptHandler<peripherals::USART6>;
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});
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#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
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bind_interrupts!(struct Irqs {
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LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
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});
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2022-08-17 18:49:55 +02:00
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let p = embassy_stm32::init(config());
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2021-12-08 05:43:39 +01:00
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info!("Hello World!");
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// Arduino pins D0 and D1
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// They're connected together with a 1K resistor.
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2022-02-24 00:19:26 +01:00
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#[cfg(feature = "stm32f103c8")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5);
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2021-12-08 05:43:39 +01:00
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#[cfg(feature = "stm32g491re")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
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2021-12-08 05:43:39 +01:00
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#[cfg(feature = "stm32g071rb")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
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2021-12-08 05:43:39 +01:00
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#[cfg(feature = "stm32f429zi")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1);
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2021-12-08 05:43:39 +01:00
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#[cfg(feature = "stm32wb55rg")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
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2021-12-08 05:43:39 +01:00
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#[cfg(feature = "stm32h755zi")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1);
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2022-04-26 23:57:26 +02:00
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#[cfg(feature = "stm32u585ai")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
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2023-04-10 15:12:47 +02:00
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#[cfg(feature = "stm32h563zi")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
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2023-04-11 13:37:10 +02:00
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#[cfg(feature = "stm32c031c6")]
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2023-05-25 00:29:56 +02:00
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
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2021-12-08 05:43:39 +01:00
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let config = Config::default();
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2023-05-01 18:17:29 +02:00
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let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
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2021-12-08 05:43:39 +01:00
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2023-05-01 18:17:29 +02:00
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const LEN: usize = 128;
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let mut tx_buf = [0; LEN];
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let mut rx_buf = [0; LEN];
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for i in 0..LEN {
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tx_buf[i] = i as u8;
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}
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2021-12-08 05:43:39 +01:00
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2023-05-01 18:17:29 +02:00
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let (mut tx, mut rx) = usart.split();
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2021-12-08 05:43:39 +01:00
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2023-05-01 18:17:29 +02:00
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let tx_fut = async {
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tx.write(&tx_buf).await.unwrap();
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};
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let rx_fut = async {
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rx.read(&mut rx_buf).await.unwrap();
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};
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2023-05-02 19:35:02 +02:00
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// note: rx needs to be polled first, to workaround this bug:
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// https://github.com/embassy-rs/embassy/issues/1426
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2023-05-01 18:17:29 +02:00
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join(rx_fut, tx_fut).await;
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assert_eq!(tx_buf, rx_buf);
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2021-12-08 05:43:39 +01:00
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info!("Test OK");
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cortex_m::asm::bkpt();
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}
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