82 lines
2.7 KiB
Rust
82 lines
2.7 KiB
Rust
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//! Boot Select button
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//!
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//! The RP2040 rom supports a BOOTSEL button that is used to enter the USB bootloader
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//! if held during reset. To avoid wasting GPIO pins, the button is multiplexed onto
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//! the CS pin of the QSPI flash, but that makes it somewhat expensive and complicated
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//! to utilize outside of the rom's bootloader.
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//!
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//! This module provides functionality to poll BOOTSEL from an embassy application.
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use crate::flash::in_ram;
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/// Polls the BOOTSEL button. Returns true if the button is pressed.
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///
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/// Polling isn't cheap, as this function waits for core 1 to finish it's current
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/// task and for any DMAs from flash to complete
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pub fn poll_bootsel() -> bool {
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let mut cs_status = Default::default();
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unsafe { in_ram(|| cs_status = ram_helpers::read_cs_status()) }.expect("Must be called from Core 0");
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// bootsel is active low, so invert
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!cs_status.infrompad()
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}
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mod ram_helpers {
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use rp_pac::io::regs::GpioStatus;
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/// Temporally reconfigures the CS gpio and returns the GpioStatus.
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/// This function runs from RAM so it can disable flash XIP.
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///
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/// # Safety
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///
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/// The caller must ensure flash is idle and will remain idle.
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/// This function must live in ram. It uses inline asm to avoid any
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/// potential calls to ABI functions that might be in flash.
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#[inline(never)]
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#[link_section = ".data.ram_func"]
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#[cfg(target_arch = "arm")]
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pub unsafe fn read_cs_status() -> GpioStatus {
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let result: u32;
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// Magic value, used as both OEOVER::DISABLE and delay loop counter
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let magic = 0x2000;
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core::arch::asm!(
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".equiv GPIO_STATUS, 0x0",
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".equiv GPIO_CTRL, 0x4",
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"ldr {orig_ctrl}, [{cs_gpio}, $GPIO_CTRL]",
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// The BOOTSEL pulls the flash's CS line low though a 1K resistor.
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// this is weak enough to avoid disrupting normal operation.
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// But, if we disable CS's output drive and allow it to float...
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"str {val}, [{cs_gpio}, $GPIO_CTRL]",
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// ...then wait for the state to settle...
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"1:", // ~4000 cycle delay loop
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"subs {val}, #8",
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"bne 1b",
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// ...we can read the current state of bootsel
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"ldr {val}, [{cs_gpio}, $GPIO_STATUS]",
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// Finally, restore CS to normal operation so XIP can continue
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"str {orig_ctrl}, [{cs_gpio}, $GPIO_CTRL]",
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cs_gpio = in(reg) rp_pac::IO_QSPI.gpio(1).as_ptr(),
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orig_ctrl = out(reg) _,
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val = inout(reg) magic => result,
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options(nostack),
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);
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core::mem::transmute(result)
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}
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#[cfg(not(target_arch = "arm"))]
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pub unsafe fn read_cs_status() -> GpioStatus {
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unimplemented!()
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}
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}
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