2021-07-21 20:09:24 +02:00
|
|
|
#![no_std]
|
|
|
|
#![no_main]
|
|
|
|
#![feature(type_alias_impl_trait)]
|
|
|
|
|
|
|
|
use core::fmt::Write;
|
2022-04-02 04:35:06 +02:00
|
|
|
use core::str::from_utf8;
|
2022-06-12 22:15:44 +02:00
|
|
|
|
2022-04-02 04:35:06 +02:00
|
|
|
use cortex_m_rt::entry;
|
|
|
|
use defmt::*;
|
2022-08-17 23:40:16 +02:00
|
|
|
use embassy_executor::Executor;
|
2021-07-21 20:09:24 +02:00
|
|
|
use embassy_stm32::dma::NoDma;
|
2021-08-03 20:31:41 +02:00
|
|
|
use embassy_stm32::peripherals::SPI3;
|
2022-07-11 00:36:10 +02:00
|
|
|
use embassy_stm32::time::mhz;
|
2022-06-12 22:15:44 +02:00
|
|
|
use embassy_stm32::{spi, Config};
|
2021-08-03 20:31:41 +02:00
|
|
|
use heapless::String;
|
2022-08-22 15:51:44 +02:00
|
|
|
use static_cell::StaticCell;
|
2022-06-12 22:15:44 +02:00
|
|
|
use {defmt_rtt as _, panic_probe as _};
|
2021-07-21 20:09:24 +02:00
|
|
|
|
2022-07-29 21:58:35 +02:00
|
|
|
#[embassy_executor::task]
|
2021-08-03 19:57:18 +02:00
|
|
|
async fn main_task(mut spi: spi::Spi<'static, SPI3, NoDma, NoDma>) {
|
2021-07-21 20:09:24 +02:00
|
|
|
for n in 0u32.. {
|
|
|
|
let mut write: String<128> = String::new();
|
|
|
|
core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap();
|
|
|
|
unsafe {
|
2022-01-19 17:29:47 +01:00
|
|
|
let result = spi.blocking_transfer_in_place(write.as_bytes_mut());
|
2021-07-21 20:09:24 +02:00
|
|
|
if let Err(_) = result {
|
|
|
|
defmt::panic!("crap");
|
|
|
|
}
|
|
|
|
}
|
2021-08-03 19:57:18 +02:00
|
|
|
info!("read via spi: {}", from_utf8(write.as_bytes()).unwrap());
|
2021-07-21 20:09:24 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-08-22 15:51:44 +02:00
|
|
|
static EXECUTOR: StaticCell<Executor> = StaticCell::new();
|
2021-07-21 20:09:24 +02:00
|
|
|
|
|
|
|
#[entry]
|
|
|
|
fn main() -> ! {
|
|
|
|
info!("Hello World!");
|
|
|
|
|
2022-08-17 22:25:58 +02:00
|
|
|
let mut config = Config::default();
|
2023-09-19 04:22:57 +02:00
|
|
|
{
|
|
|
|
use embassy_stm32::rcc::*;
|
|
|
|
config.rcc.hsi = Some(Hsi::Mhz64);
|
|
|
|
config.rcc.csi = true;
|
|
|
|
config.rcc.pll_src = PllSource::Hsi;
|
|
|
|
config.rcc.pll1 = Some(Pll {
|
2023-10-09 02:48:22 +02:00
|
|
|
prediv: PllPreDiv::DIV4,
|
|
|
|
mul: PllMul::MUL50,
|
|
|
|
divp: Some(PllDiv::DIV2),
|
|
|
|
divq: Some(PllDiv::DIV8), // used by SPI3. 100Mhz.
|
2023-09-19 04:22:57 +02:00
|
|
|
divr: None,
|
|
|
|
});
|
|
|
|
config.rcc.sys = Sysclk::Pll1P; // 400 Mhz
|
|
|
|
config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz
|
|
|
|
config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz
|
|
|
|
config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz
|
|
|
|
config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz
|
|
|
|
config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz
|
|
|
|
config.rcc.voltage_scale = VoltageScale::Scale1;
|
|
|
|
}
|
2022-08-17 22:25:58 +02:00
|
|
|
let p = embassy_stm32::init(config);
|
2021-07-21 20:09:24 +02:00
|
|
|
|
2023-07-30 19:26:24 +02:00
|
|
|
let mut spi_config = spi::Config::default();
|
|
|
|
spi_config.frequency = mhz(1);
|
|
|
|
|
2023-07-30 19:31:22 +02:00
|
|
|
let spi = spi::Spi::new(p.SPI3, p.PB3, p.PB5, p.PB4, NoDma, NoDma, spi_config);
|
2021-07-21 20:09:24 +02:00
|
|
|
|
2022-08-22 15:51:44 +02:00
|
|
|
let executor = EXECUTOR.init(Executor::new());
|
2021-07-21 20:09:24 +02:00
|
|
|
|
|
|
|
executor.run(|spawner| {
|
2021-08-03 19:57:18 +02:00
|
|
|
unwrap!(spawner.spawn(main_task(spi)));
|
2021-07-21 20:09:24 +02:00
|
|
|
})
|
|
|
|
}
|