2021-06-08 16:36:47 +02:00
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#![no_std]
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#![no_main]
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#![feature(trait_alias)]
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#![feature(min_type_alias_impl_trait)]
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#![feature(impl_trait_in_bindings)]
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#![feature(type_alias_impl_trait)]
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#![allow(incomplete_features)]
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#[path = "../example_common.rs"]
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mod example_common;
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use cortex_m_rt::entry;
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2021-07-15 00:30:31 +02:00
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use embassy_stm32::gpio::{Level, Output, Speed};
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use embassy_stm32::pac;
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2021-06-08 16:36:47 +02:00
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use embassy_stm32::spi::{Config, Spi};
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use embassy_stm32::time::Hertz;
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use embedded_hal::blocking::spi::Transfer;
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2021-07-15 00:30:31 +02:00
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use embedded_hal::digital::v2::OutputPin;
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use example_common::*;
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2021-06-08 16:36:47 +02:00
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#[entry]
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fn main() -> ! {
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info!("Hello World, dude!");
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2021-07-15 00:30:31 +02:00
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unsafe {
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pac::DBGMCU.cr().modify(|w| {
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w.set_dbg_sleep(true);
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w.set_dbg_standby(true);
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w.set_dbg_stop(true);
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});
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2021-06-08 16:36:47 +02:00
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2021-07-15 00:30:31 +02:00
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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2021-06-08 16:36:47 +02:00
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2021-07-15 00:30:31 +02:00
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pac::RCC.ahb2enr().modify(|w| {
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w.set_gpioaen(true);
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w.set_gpioben(true);
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w.set_gpiocen(true);
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w.set_gpioden(true);
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w.set_gpioeen(true);
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w.set_gpiofen(true);
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});
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}
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2021-06-08 16:36:47 +02:00
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let p = embassy_stm32::init(Default::default());
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let mut spi = Spi::new(
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p.SPI3,
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p.PC10,
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p.PC12,
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p.PC11,
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Hertz(1_000_000),
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Config::default(),
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);
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2021-06-25 22:32:24 +02:00
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let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh);
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2021-06-08 16:36:47 +02:00
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loop {
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let mut buf = [0x0A; 4];
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unwrap!(cs.set_low());
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unwrap!(spi.transfer(&mut buf));
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unwrap!(cs.set_high());
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info!("xfer {=[u8]:x}", buf);
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}
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}
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