2022-09-26 05:32:45 +02:00
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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2023-05-30 00:10:36 +02:00
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#[path = "../common.rs"]
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mod common;
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2022-09-26 05:32:45 +02:00
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2023-04-30 04:21:11 +02:00
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use defmt::{assert_eq, panic, *};
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2022-09-26 05:32:45 +02:00
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use embassy_executor::Spawner;
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2023-05-15 15:21:05 +02:00
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use embassy_rp::bind_interrupts;
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use embassy_rp::gpio::{Level, Output};
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2023-05-15 15:21:05 +02:00
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use embassy_rp::peripherals::UART0;
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use embassy_rp::uart::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, Config, Error, Instance, Parity};
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2023-04-30 04:21:11 +02:00
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use embassy_time::{Duration, Timer};
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use embedded_io::asynch::{Read, ReadExactError, Write};
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2022-09-26 05:32:45 +02:00
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use {defmt_rtt as _, panic_probe as _};
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2023-05-15 15:21:05 +02:00
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bind_interrupts!(struct Irqs {
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UART0_IRQ => BufferedInterruptHandler<UART0>;
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});
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2023-04-30 04:21:11 +02:00
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async fn read<const N: usize>(uart: &mut BufferedUart<'_, impl Instance>) -> Result<[u8; N], Error> {
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let mut buf = [255; N];
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match uart.read_exact(&mut buf).await {
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Ok(()) => Ok(buf),
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// we should not ever produce an Eof condition
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Err(ReadExactError::UnexpectedEof) => panic!(),
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Err(ReadExactError::Other(e)) => Err(e),
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}
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}
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async fn read1<const N: usize>(uart: &mut BufferedUartRx<'_, impl Instance>) -> Result<[u8; N], Error> {
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let mut buf = [255; N];
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match uart.read_exact(&mut buf).await {
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Ok(()) => Ok(buf),
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// we should not ever produce an Eof condition
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Err(ReadExactError::UnexpectedEof) => panic!(),
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Err(ReadExactError::Other(e)) => Err(e),
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}
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}
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async fn send(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: Option<bool>) {
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pin.set_low();
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Timer::after(Duration::from_millis(1)).await;
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for i in 0..8 {
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if v & (1 << i) == 0 {
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pin.set_low();
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} else {
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pin.set_high();
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}
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Timer::after(Duration::from_millis(1)).await;
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}
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if let Some(b) = parity {
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if b {
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pin.set_high();
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} else {
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pin.set_low();
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}
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Timer::after(Duration::from_millis(1)).await;
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}
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pin.set_high();
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Timer::after(Duration::from_millis(1)).await;
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}
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2022-09-26 05:32:45 +02:00
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let p = embassy_rp::init(Default::default());
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info!("Hello World!");
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2023-04-30 04:21:11 +02:00
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let (mut tx, mut rx, mut uart) = (p.PIN_0, p.PIN_1, p.UART0);
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{
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let config = Config::default();
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let tx_buf = &mut [0u8; 16];
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let rx_buf = &mut [0u8; 16];
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2023-05-15 15:21:05 +02:00
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let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
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2023-04-30 04:21:11 +02:00
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// Make sure we send more bytes than fits in the FIFO, to test the actual
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// bufferedUart.
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let data = [
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1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
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30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
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];
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uart.write_all(&data).await.unwrap();
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info!("Done writing");
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assert_eq!(read(&mut uart).await.unwrap(), data);
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}
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info!("test overflow detection");
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{
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let config = Config::default();
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let tx_buf = &mut [0u8; 16];
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let rx_buf = &mut [0u8; 16];
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2023-05-15 15:21:05 +02:00
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let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
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2023-04-30 04:21:11 +02:00
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// Make sure we send more bytes than fits in the FIFO, to test the actual
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// bufferedUart.
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let data = [
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1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
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30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
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];
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let overflow = [
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101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116,
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];
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// give each block time to settle into the fifo. we want the overrun to occur at a well-defined point.
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uart.write_all(&data).await.unwrap();
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uart.blocking_flush().unwrap();
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while uart.busy() {}
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uart.write_all(&overflow).await.unwrap();
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uart.blocking_flush().unwrap();
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while uart.busy() {}
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// already buffered/fifod prefix is valid
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assert_eq!(read(&mut uart).await.unwrap(), data);
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// next received character causes overrun error and is discarded
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uart.write_all(&[1, 2, 3]).await.unwrap();
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uart.blocking_flush().unwrap();
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assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Overrun);
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assert_eq!(read(&mut uart).await.unwrap(), [2, 3]);
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}
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info!("test break detection");
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{
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let mut config = Config::default();
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config.baudrate = 1000;
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let tx_buf = &mut [0u8; 16];
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let rx_buf = &mut [0u8; 16];
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2023-05-15 15:21:05 +02:00
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let mut uart = BufferedUart::new(&mut uart, Irqs, &mut tx, &mut rx, tx_buf, rx_buf, config);
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2023-04-30 04:21:11 +02:00
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// break on empty buffer
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uart.send_break(20).await;
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assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Break);
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uart.write_all(&[64]).await.unwrap();
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assert_eq!(read(&mut uart).await.unwrap(), [64]);
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// break on partially filled buffer
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uart.write_all(&[65; 2]).await.unwrap();
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uart.send_break(20).await;
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uart.write_all(&[66]).await.unwrap();
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assert_eq!(read(&mut uart).await.unwrap(), [65; 2]);
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assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Break);
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assert_eq!(read(&mut uart).await.unwrap(), [66]);
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// break on full buffer
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uart.write_all(&[64; 16]).await.unwrap();
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uart.send_break(20).await;
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uart.write_all(&[65]).await.unwrap();
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assert_eq!(read(&mut uart).await.unwrap(), [64; 16]);
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assert_eq!(read::<1>(&mut uart).await.unwrap_err(), Error::Break);
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assert_eq!(read(&mut uart).await.unwrap(), [65]);
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}
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// parity detection. here we bitbang to not require two uarts.
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info!("test parity error detection");
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{
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let mut pin = Output::new(&mut tx, Level::High);
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// choose a very slow baud rate to make tests reliable even with O0
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let mut config = Config::default();
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config.baudrate = 1000;
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config.parity = Parity::ParityEven;
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let rx_buf = &mut [0u8; 16];
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2023-05-15 15:21:05 +02:00
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let mut uart = BufferedUartRx::new(&mut uart, Irqs, &mut rx, rx_buf, config);
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2023-04-30 04:21:11 +02:00
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async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, parity: u32) {
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send(pin, v, Some(parity != 0)).await;
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}
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// first check that we can send correctly
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chr(&mut pin, 64, 1).await;
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assert_eq!(read1(&mut uart).await.unwrap(), [64]);
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// parity on empty buffer
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chr(&mut pin, 64, 0).await;
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chr(&mut pin, 4, 1).await;
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assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
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assert_eq!(read1(&mut uart).await.unwrap(), [4]);
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// parity on partially filled buffer
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chr(&mut pin, 64, 1).await;
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chr(&mut pin, 32, 1).await;
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chr(&mut pin, 64, 0).await;
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chr(&mut pin, 65, 0).await;
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assert_eq!(read1(&mut uart).await.unwrap(), [64, 32]);
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assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
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assert_eq!(read1(&mut uart).await.unwrap(), [65]);
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// parity on full buffer
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for i in 0..16 {
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chr(&mut pin, i, i.count_ones() % 2).await;
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}
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chr(&mut pin, 64, 0).await;
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chr(&mut pin, 65, 0).await;
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assert_eq!(
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read1(&mut uart).await.unwrap(),
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[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
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);
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assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Parity);
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assert_eq!(read1(&mut uart).await.unwrap(), [65]);
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}
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// framing error detection. here we bitbang because there's no other way.
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info!("test framing error detection");
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{
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let mut pin = Output::new(&mut tx, Level::High);
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// choose a very slow baud rate to make tests reliable even with O0
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let mut config = Config::default();
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config.baudrate = 1000;
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let rx_buf = &mut [0u8; 16];
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2023-05-15 15:21:05 +02:00
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let mut uart = BufferedUartRx::new(&mut uart, Irqs, &mut rx, rx_buf, config);
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2023-04-30 04:21:11 +02:00
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async fn chr(pin: &mut Output<'_, impl embassy_rp::gpio::Pin>, v: u8, good: bool) {
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if good {
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send(pin, v, None).await;
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} else {
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send(pin, v, Some(false)).await;
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}
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}
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2022-09-26 05:32:45 +02:00
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2023-04-30 04:21:11 +02:00
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// first check that we can send correctly
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chr(&mut pin, 64, true).await;
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assert_eq!(read1(&mut uart).await.unwrap(), [64]);
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2022-09-26 05:32:45 +02:00
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2023-04-30 04:21:11 +02:00
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// framing on empty buffer
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chr(&mut pin, 64, false).await;
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assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
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chr(&mut pin, 65, true).await;
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assert_eq!(read1(&mut uart).await.unwrap(), [65]);
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2022-09-27 05:51:38 +02:00
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2023-04-30 04:21:11 +02:00
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// framing on partially filled buffer
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chr(&mut pin, 64, true).await;
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chr(&mut pin, 32, true).await;
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chr(&mut pin, 64, false).await;
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chr(&mut pin, 65, true).await;
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assert_eq!(read1(&mut uart).await.unwrap(), [64, 32]);
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assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
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assert_eq!(read1(&mut uart).await.unwrap(), [65]);
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2022-09-26 05:32:45 +02:00
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2023-04-30 04:21:11 +02:00
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// framing on full buffer
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for i in 0..16 {
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chr(&mut pin, i, true).await;
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}
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chr(&mut pin, 64, false).await;
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chr(&mut pin, 65, true).await;
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assert_eq!(
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read1(&mut uart).await.unwrap(),
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[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
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);
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assert_eq!(read1::<1>(&mut uart).await.unwrap_err(), Error::Framing);
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assert_eq!(read1(&mut uart).await.unwrap(), [65]);
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}
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2022-09-26 05:32:45 +02:00
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info!("Test OK");
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cortex_m::asm::bkpt();
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}
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