2022-07-11 02:57:46 +02:00
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use core::convert::TryInto;
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use core::ptr::write_volatile;
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2022-12-23 20:46:49 +01:00
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use core::sync::atomic::{fence, Ordering};
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2022-07-11 02:57:46 +02:00
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2023-03-29 11:31:45 +02:00
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use super::{FlashSector, FLASH_BASE, FLASH_SIZE, WRITE_SIZE};
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2022-07-11 02:57:46 +02:00
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use crate::flash::Error;
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use crate::pac;
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2023-03-29 11:31:45 +02:00
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const SMALL_SECTOR_SIZE: u32 = 16 * 1024;
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const MEDIUM_SECTOR_SIZE: u32 = 64 * 1024;
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const LARGE_SECTOR_SIZE: u32 = 128 * 1024;
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const SECOND_BANK_SECTOR_OFFSET: u8 = 12;
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2023-03-30 05:27:57 +02:00
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#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479))]
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mod alt_regions {
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use embassy_hal_common::PeripheralRef;
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use stm32_metapac::FLASH_SIZE;
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use crate::_generated::flash_regions::{BANK1_REGION1, BANK1_REGION2, BANK1_REGION3};
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use crate::flash::{Bank1Region1, Bank1Region2, Flash, FlashRegion};
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use crate::peripherals::FLASH;
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pub const ALT_BANK1_REGION3: FlashRegion = FlashRegion {
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size: 3 * BANK1_REGION3.erase_size,
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..BANK1_REGION3
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};
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pub const ALT_BANK2_REGION1: FlashRegion = FlashRegion {
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base: BANK1_REGION1.base + FLASH_SIZE as u32 / 2,
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..BANK1_REGION1
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};
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pub const ALT_BANK2_REGION2: FlashRegion = FlashRegion {
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base: BANK1_REGION2.base + FLASH_SIZE as u32 / 2,
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..BANK1_REGION2
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};
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pub const ALT_BANK2_REGION3: FlashRegion = FlashRegion {
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base: BANK1_REGION3.base + FLASH_SIZE as u32 / 2,
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size: 3 * BANK1_REGION3.erase_size,
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..BANK1_REGION3
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};
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pub type AltBank1Region1 = Bank1Region1;
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pub type AltBank1Region2 = Bank1Region2;
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pub struct AltBank1Region3(&'static FlashRegion);
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pub struct AltBank2Region1(&'static FlashRegion);
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pub struct AltBank2Region2(&'static FlashRegion);
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pub struct AltBank2Region3(&'static FlashRegion);
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pub struct AltFlashLayout<'d> {
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_inner: PeripheralRef<'d, FLASH>,
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pub bank1_region1: AltBank1Region1,
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pub bank1_region2: AltBank1Region2,
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pub bank1_region3: AltBank1Region3,
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pub bank2_region1: AltBank2Region1,
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pub bank2_region2: AltBank2Region2,
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pub bank2_region3: AltBank2Region3,
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}
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impl<'d> Flash<'d> {
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pub fn into_alt_regions(self) -> AltFlashLayout<'d> {
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unsafe { crate::pac::FLASH.optcr().modify(|r| r.set_db1m(true)) };
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AltFlashLayout {
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_inner: self.release(),
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bank1_region1: Bank1Region1(&BANK1_REGION1),
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bank1_region2: Bank1Region2(&BANK1_REGION2),
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bank1_region3: AltBank1Region3(&ALT_BANK1_REGION3),
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bank2_region1: AltBank2Region1(&ALT_BANK2_REGION1),
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bank2_region2: AltBank2Region2(&ALT_BANK2_REGION2),
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bank2_region3: AltBank2Region3(&ALT_BANK2_REGION3),
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}
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}
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}
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impl Drop for AltFlashLayout<'_> {
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fn drop(&mut self) {
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unsafe {
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super::lock();
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crate::pac::FLASH.optcr().modify(|r| r.set_db1m(false))
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};
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}
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}
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}
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#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479))]
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pub use alt_regions::AltFlashLayout;
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2023-03-25 16:04:45 +01:00
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fn is_dual_bank() -> bool {
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2023-03-30 05:27:57 +02:00
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// let asd: super::Bank1Region1;
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// let sad = &super::BANK_1_REGION_1;
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2022-07-11 02:57:46 +02:00
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match FLASH_SIZE / 1024 {
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// 1 MB devices depend on configuration
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1024 => {
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2022-07-11 03:07:28 +02:00
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if cfg!(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479)) {
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2023-03-25 16:04:45 +01:00
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unsafe { pac::FLASH.optcr().read().db1m() }
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2022-07-11 02:57:46 +02:00
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} else {
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false
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}
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}
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// 2 MB devices are always dual bank
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2048 => true,
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// All other devices are single bank
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_ => false,
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}
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}
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pub(crate) unsafe fn lock() {
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pac::FLASH.cr().modify(|w| w.set_lock(true));
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}
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pub(crate) unsafe fn unlock() {
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pac::FLASH.keyr().write(|w| w.set_key(0x4567_0123));
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pac::FLASH.keyr().write(|w| w.set_key(0xCDEF_89AB));
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}
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2023-03-25 16:04:45 +01:00
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pub(crate) unsafe fn begin_write() {
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assert_eq!(0, WRITE_SIZE % 4);
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2022-07-11 02:57:46 +02:00
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pac::FLASH.cr().write(|w| {
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w.set_pg(true);
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w.set_psize(pac::flash::vals::Psize::PSIZE32);
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});
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2023-03-25 16:04:45 +01:00
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}
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2022-07-11 02:57:46 +02:00
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2023-03-25 16:04:45 +01:00
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pub(crate) unsafe fn end_write() {
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pac::FLASH.cr().write(|w| w.set_pg(false));
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}
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2022-07-11 02:57:46 +02:00
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2023-03-25 16:04:45 +01:00
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pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> {
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let mut address = start_address;
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for val in buf.chunks(4) {
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write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap()));
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address += val.len() as u32;
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2022-07-11 02:57:46 +02:00
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2023-03-25 16:04:45 +01:00
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// prevents parallelism errors
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fence(Ordering::SeqCst);
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}
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2022-07-11 02:57:46 +02:00
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2023-03-25 16:04:45 +01:00
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blocking_wait_ready()
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2022-07-11 02:57:46 +02:00
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}
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2023-03-29 13:37:10 +02:00
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pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> {
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let sector = sector.index;
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2023-03-25 05:59:40 +01:00
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let bank = sector / SECOND_BANK_SECTOR_OFFSET as u8;
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let snb = (bank << 4) + (sector % SECOND_BANK_SECTOR_OFFSET as u8);
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2022-07-11 02:57:46 +02:00
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2022-07-14 18:41:39 +02:00
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trace!("Erasing sector: {}", sector);
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2022-07-11 02:57:46 +02:00
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pac::FLASH.cr().modify(|w| {
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w.set_ser(true);
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w.set_snb(snb)
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});
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pac::FLASH.cr().modify(|w| {
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w.set_strt(true);
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});
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let ret: Result<(), Error> = blocking_wait_ready();
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clear_all_err();
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ret
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}
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pub(crate) unsafe fn clear_all_err() {
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pac::FLASH.sr().write(|w| {
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w.set_pgserr(true);
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w.set_pgperr(true);
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w.set_pgaerr(true);
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w.set_wrperr(true);
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w.set_eop(true);
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});
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}
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2023-03-25 16:04:45 +01:00
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unsafe fn blocking_wait_ready() -> Result<(), Error> {
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2022-07-11 02:57:46 +02:00
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loop {
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let sr = pac::FLASH.sr().read();
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if !sr.bsy() {
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if sr.pgserr() {
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return Err(Error::Seq);
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}
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if sr.pgperr() {
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return Err(Error::Parallelism);
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}
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if sr.pgaerr() {
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return Err(Error::Unaligned);
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}
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if sr.wrperr() {
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return Err(Error::Protected);
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}
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return Ok(());
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}
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}
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}
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2023-03-29 11:31:45 +02:00
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2023-03-29 12:49:13 +02:00
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pub(crate) fn get_sector(address: u32) -> FlashSector {
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2023-03-29 13:37:10 +02:00
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get_sector_inner(address, is_dual_bank(), FLASH_SIZE as u32)
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2023-03-29 12:49:13 +02:00
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}
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fn get_sector_inner(address: u32, dual_bank: bool, flash_size: u32) -> FlashSector {
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2023-03-29 11:31:45 +02:00
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let offset = address - FLASH_BASE as u32;
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if !dual_bank {
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get_single_bank_sector(offset)
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} else {
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let bank_size = flash_size / 2;
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if offset < bank_size {
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get_single_bank_sector(offset)
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} else {
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let sector = get_single_bank_sector(offset - bank_size);
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FlashSector {
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index: SECOND_BANK_SECTOR_OFFSET + sector.index,
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start: sector.start + bank_size,
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size: sector.size,
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}
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}
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}
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}
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fn get_single_bank_sector(offset: u32) -> FlashSector {
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// First 4 sectors are 16KB, then one 64KB, and rest are 128KB
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match offset / LARGE_SECTOR_SIZE {
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0 => {
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if offset < 4 * SMALL_SECTOR_SIZE {
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let small_sector_index = offset / SMALL_SECTOR_SIZE;
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FlashSector {
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index: small_sector_index as u8,
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start: FLASH_BASE as u32 + small_sector_index * SMALL_SECTOR_SIZE,
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size: SMALL_SECTOR_SIZE,
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}
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} else {
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FlashSector {
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index: 4,
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start: FLASH_BASE as u32 + 4 * SMALL_SECTOR_SIZE,
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size: MEDIUM_SECTOR_SIZE,
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}
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}
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}
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i => {
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let large_sector_index = i - 1;
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FlashSector {
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index: (5 + large_sector_index) as u8,
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2023-03-29 12:49:13 +02:00
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start: FLASH_BASE as u32
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+ 4 * SMALL_SECTOR_SIZE
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+ MEDIUM_SECTOR_SIZE
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+ large_sector_index * LARGE_SECTOR_SIZE,
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2023-03-29 11:31:45 +02:00
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size: LARGE_SECTOR_SIZE,
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}
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}
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[test]
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fn can_get_sector_single_bank() {
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let assert_sector = |index: u8, start: u32, size: u32, addr: u32| {
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2023-03-29 12:49:13 +02:00
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assert_eq!(
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FlashSector { index, start, size },
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get_sector_inner(addr, false, 1024 * 1024)
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)
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2023-03-29 11:31:45 +02:00
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};
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assert_sector(0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_0000);
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assert_sector(0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_3FFF);
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assert_sector(3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_C000);
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assert_sector(3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_FFFF);
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assert_sector(4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_0000);
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assert_sector(4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_FFFF);
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assert_sector(5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0802_0000);
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assert_sector(5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0803_FFFF);
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assert_sector(11, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080E_0000);
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assert_sector(11, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080F_FFFF);
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}
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#[test]
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fn can_get_sector_dual_bank() {
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let assert_sector = |index: u8, start: u32, size: u32, addr: u32| {
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2023-03-29 12:49:13 +02:00
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assert_eq!(
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FlashSector { index, start, size },
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get_sector_inner(addr, true, 1024 * 1024)
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)
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2023-03-29 11:31:45 +02:00
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};
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assert_sector(0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_0000);
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assert_sector(0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_3FFF);
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assert_sector(3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_C000);
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assert_sector(3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_FFFF);
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assert_sector(4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_0000);
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assert_sector(4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_FFFF);
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assert_sector(5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0802_0000);
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assert_sector(5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0803_FFFF);
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assert_sector(7, 0x0806_0000, LARGE_SECTOR_SIZE, 0x0806_0000);
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assert_sector(7, 0x0806_0000, LARGE_SECTOR_SIZE, 0x0807_FFFF);
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assert_sector(12, 0x0808_0000, SMALL_SECTOR_SIZE, 0x0808_0000);
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assert_sector(12, 0x0808_0000, SMALL_SECTOR_SIZE, 0x0808_3FFF);
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assert_sector(15, 0x0808_C000, SMALL_SECTOR_SIZE, 0x0808_C000);
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assert_sector(15, 0x0808_C000, SMALL_SECTOR_SIZE, 0x0808_FFFF);
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assert_sector(16, 0x0809_0000, MEDIUM_SECTOR_SIZE, 0x0809_0000);
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assert_sector(16, 0x0809_0000, MEDIUM_SECTOR_SIZE, 0x0809_FFFF);
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assert_sector(17, 0x080A_0000, LARGE_SECTOR_SIZE, 0x080A_0000);
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|
assert_sector(17, 0x080A_0000, LARGE_SECTOR_SIZE, 0x080B_FFFF);
|
|
|
|
assert_sector(19, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080E_0000);
|
|
|
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assert_sector(19, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080F_FFFF);
|
|
|
|
}
|
|
|
|
}
|