2023-07-28 15:29:27 +02:00
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pub mod complementary_pwm;
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2023-08-31 01:10:26 +02:00
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pub mod qei;
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2023-07-28 15:29:27 +02:00
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pub mod simple_pwm;
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2022-06-12 22:15:44 +02:00
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use stm32_metapac::timer::vals;
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2021-12-08 17:36:40 +01:00
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2023-06-08 16:08:40 +02:00
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use crate::interrupt;
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2022-06-12 22:15:44 +02:00
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use crate::rcc::RccPeripheral;
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2021-12-08 17:36:40 +01:00
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use crate::time::Hertz;
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#[cfg(feature = "unstable-pac")]
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pub mod low_level {
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pub use super::sealed::*;
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}
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pub(crate) mod sealed {
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2023-09-28 02:15:24 +02:00
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2021-12-08 17:36:40 +01:00
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use super::*;
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pub trait Basic16bitInstance: RccPeripheral {
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2023-06-08 16:08:40 +02:00
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type Interrupt: interrupt::typelevel::Interrupt;
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2021-12-08 17:36:40 +01:00
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2022-02-28 16:20:42 +01:00
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fn regs() -> crate::pac::timer::TimBasic;
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2021-12-08 17:36:40 +01:00
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2023-09-30 18:14:20 +02:00
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fn start(&mut self) {
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Self::regs().cr1().modify(|r| r.set_cen(true));
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}
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2021-12-08 17:36:40 +01:00
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2023-09-30 18:14:20 +02:00
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fn stop(&mut self) {
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Self::regs().cr1().modify(|r| r.set_cen(false));
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}
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2021-12-08 17:36:40 +01:00
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2023-10-02 21:41:30 +02:00
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/// Reset the counter value to 0
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2023-09-30 18:14:20 +02:00
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fn reset(&mut self) {
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Self::regs().cnt().write(|r| r.set_cnt(0));
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}
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2021-12-08 17:36:40 +01:00
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2023-10-02 21:41:30 +02:00
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/// Set the frequency of how many times per second the timer counts up to the max value or down to 0.
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///
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/// This means that in the default edge-aligned mode,
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/// the timer counter will wrap around at the same frequency as is being set.
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/// In center-aligned mode (which not all timers support), the wrap-around frequency is effectively halved
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/// because it needs to count up and down.
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2023-09-30 18:14:20 +02:00
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fn set_frequency(&mut self, frequency: Hertz) {
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let f = frequency.0;
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let timer_f = Self::frequency().0;
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assert!(f > 0);
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let pclk_ticks_per_timer_period = timer_f / f;
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let psc: u16 = unwrap!(((pclk_ticks_per_timer_period - 1) / (1 << 16)).try_into());
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2023-12-02 05:06:48 +01:00
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let divide_by = pclk_ticks_per_timer_period / (u32::from(psc) + 1);
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// the timer counts `0..=arr`, we want it to count `0..divide_by`
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let arr = unwrap!(u16::try_from(divide_by - 1));
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2023-09-30 18:14:20 +02:00
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let regs = Self::regs();
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regs.psc().write(|r| r.set_psc(psc));
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regs.arr().write(|r| r.set_arr(arr));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY));
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regs.egr().write(|r| r.set_ug(true));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT));
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}
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2021-12-08 17:36:40 +01:00
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2023-09-30 18:14:20 +02:00
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fn clear_update_interrupt(&mut self) -> bool {
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let regs = Self::regs();
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let sr = regs.sr().read();
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if sr.uif() {
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regs.sr().modify(|r| {
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r.set_uif(false);
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});
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true
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} else {
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false
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}
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}
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2021-12-08 17:36:40 +01:00
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2023-09-30 18:14:20 +02:00
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fn enable_update_interrupt(&mut self, enable: bool) {
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Self::regs().dier().write(|r| r.set_uie(enable));
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}
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2023-09-28 02:15:24 +02:00
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2023-09-30 18:14:20 +02:00
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fn set_autoreload_preload(&mut self, enable: vals::Arpe) {
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Self::regs().cr1().modify(|r| r.set_arpe(enable));
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}
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2023-10-07 00:57:19 +02:00
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fn get_frequency(&self) -> Hertz {
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let timer_f = Self::frequency();
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let regs = Self::regs();
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let arr = regs.arr().read().arr();
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let psc = regs.psc().read().psc();
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timer_f / arr / (psc + 1)
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}
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2021-12-08 17:36:40 +01:00
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}
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pub trait GeneralPurpose16bitInstance: Basic16bitInstance {
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2022-02-28 16:20:42 +01:00
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fn regs_gp16() -> crate::pac::timer::TimGp16;
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2023-09-28 02:15:24 +02:00
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2023-10-01 23:09:01 +02:00
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fn set_counting_mode(&mut self, mode: CountingMode) {
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2023-10-02 21:14:44 +02:00
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let (cms, dir) = mode.into();
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2023-10-01 23:09:01 +02:00
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let timer_enabled = Self::regs().cr1().read().cen();
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// Changing from edge aligned to center aligned (and vice versa) is not allowed while the timer is running.
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// Changing direction is discouraged while the timer is running.
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2023-10-20 10:41:39 +02:00
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assert!(!timer_enabled);
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2023-10-01 23:09:01 +02:00
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Self::regs_gp16().cr1().modify(|r| r.set_dir(dir));
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Self::regs_gp16().cr1().modify(|r| r.set_cms(cms))
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2023-09-30 18:14:20 +02:00
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}
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2023-09-28 02:15:24 +02:00
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2023-10-02 21:14:44 +02:00
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fn get_counting_mode(&self) -> CountingMode {
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let cr1 = Self::regs_gp16().cr1().read();
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(cr1.cms(), cr1.dir()).into()
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}
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2023-09-30 18:14:20 +02:00
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fn set_clock_division(&mut self, ckd: vals::Ckd) {
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Self::regs_gp16().cr1().modify(|r| r.set_ckd(ckd));
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}
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2021-12-08 17:36:40 +01:00
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}
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pub trait GeneralPurpose32bitInstance: GeneralPurpose16bitInstance {
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2022-02-28 16:20:42 +01:00
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fn regs_gp32() -> crate::pac::timer::TimGp32;
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2021-12-08 17:36:40 +01:00
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2023-09-30 18:16:47 +02:00
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fn set_frequency(&mut self, frequency: Hertz) {
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let f = frequency.0;
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assert!(f > 0);
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let timer_f = Self::frequency().0;
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let pclk_ticks_per_timer_period = (timer_f / f) as u64;
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let psc: u16 = unwrap!(((pclk_ticks_per_timer_period - 1) / (1 << 32)).try_into());
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2023-09-30 19:53:17 +02:00
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let arr: u32 = unwrap!((pclk_ticks_per_timer_period / (psc as u64 + 1)).try_into());
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2023-09-30 18:16:47 +02:00
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let regs = Self::regs_gp32();
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regs.psc().write(|r| r.set_psc(psc));
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regs.arr().write(|r| r.set_arr(arr));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY));
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regs.egr().write(|r| r.set_ug(true));
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regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT));
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}
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2023-10-07 00:57:19 +02:00
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fn get_frequency(&self) -> Hertz {
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let timer_f = Self::frequency();
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let regs = Self::regs_gp32();
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let arr = regs.arr().read().arr();
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let psc = regs.psc().read().psc();
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timer_f / arr / (psc + 1)
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}
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2021-12-08 17:36:40 +01:00
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}
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2022-07-12 14:06:16 +02:00
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pub trait AdvancedControlInstance: GeneralPurpose16bitInstance {
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2022-02-28 16:20:42 +01:00
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fn regs_advanced() -> crate::pac::timer::TimAdv;
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2021-12-08 17:36:40 +01:00
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}
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2023-07-28 15:29:27 +02:00
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pub trait CaptureCompare16bitInstance: GeneralPurpose16bitInstance {
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2023-09-30 18:14:20 +02:00
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fn set_input_capture_filter(&mut self, channel: Channel, icf: vals::Icf) {
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let raw_channel = channel.raw();
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Self::regs_gp16()
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.ccmr_input(raw_channel / 2)
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.modify(|r| r.set_icf(raw_channel % 2, icf));
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}
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2023-09-28 02:15:24 +02:00
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2023-09-30 18:14:20 +02:00
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fn clear_input_interrupt(&mut self, channel: Channel) {
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Self::regs_gp16().sr().modify(|r| r.set_ccif(channel.raw(), false));
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}
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2023-09-28 02:15:24 +02:00
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2023-09-30 18:14:20 +02:00
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fn enable_input_interrupt(&mut self, channel: Channel, enable: bool) {
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Self::regs_gp16().dier().modify(|r| r.set_ccie(channel.raw(), enable));
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}
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fn set_input_capture_prescaler(&mut self, channel: Channel, factor: u8) {
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let raw_channel = channel.raw();
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Self::regs_gp16()
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.ccmr_input(raw_channel / 2)
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.modify(|r| r.set_icpsc(raw_channel % 2, factor));
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}
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2023-09-28 02:15:24 +02:00
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2023-09-30 18:14:20 +02:00
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fn set_input_ti_selection(&mut self, channel: Channel, tisel: InputTISelection) {
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let raw_channel = channel.raw();
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Self::regs_gp16()
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.ccmr_input(raw_channel / 2)
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.modify(|r| r.set_ccs(raw_channel % 2, tisel.into()));
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}
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fn set_input_capture_mode(&mut self, channel: Channel, mode: InputCaptureMode) {
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Self::regs_gp16().ccer().modify(|r| match mode {
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InputCaptureMode::Rising => {
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r.set_ccnp(channel.raw(), false);
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r.set_ccp(channel.raw(), false);
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}
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InputCaptureMode::Falling => {
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r.set_ccnp(channel.raw(), false);
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r.set_ccp(channel.raw(), true);
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}
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InputCaptureMode::BothEdges => {
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r.set_ccnp(channel.raw(), true);
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r.set_ccp(channel.raw(), true);
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}
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});
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}
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2023-10-13 18:50:54 +02:00
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fn enable_outputs(&mut self);
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2023-07-28 15:29:27 +02:00
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2023-09-30 18:14:20 +02:00
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fn set_output_compare_mode(&mut self, channel: Channel, mode: OutputCompareMode) {
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let r = Self::regs_gp16();
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let raw_channel: usize = channel.raw();
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r.ccmr_output(raw_channel / 2)
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.modify(|w| w.set_ocm(raw_channel % 2, mode.into()));
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}
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2023-07-28 15:29:27 +02:00
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2023-09-30 18:14:20 +02:00
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fn set_output_polarity(&mut self, channel: Channel, polarity: OutputPolarity) {
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Self::regs_gp16()
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.ccer()
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.modify(|w| w.set_ccp(channel.raw(), polarity.into()));
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}
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2023-08-18 16:37:44 +02:00
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2023-09-30 18:14:20 +02:00
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fn enable_channel(&mut self, channel: Channel, enable: bool) {
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Self::regs_gp16().ccer().modify(|w| w.set_cce(channel.raw(), enable));
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}
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2023-07-28 15:29:27 +02:00
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2023-09-30 18:14:20 +02:00
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fn set_compare_value(&mut self, channel: Channel, value: u16) {
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Self::regs_gp16().ccr(channel.raw()).modify(|w| w.set_ccr(value));
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}
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2023-07-28 15:29:27 +02:00
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2023-09-30 18:14:20 +02:00
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fn get_capture_value(&mut self, channel: Channel) -> u16 {
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Self::regs_gp16().ccr(channel.raw()).read().ccr()
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}
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2023-09-28 02:15:24 +02:00
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2023-09-30 18:14:20 +02:00
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fn get_max_compare_value(&self) -> u16 {
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Self::regs_gp16().arr().read().arr()
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}
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2023-10-07 00:57:19 +02:00
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fn get_compare_value(&self, channel: Channel) -> u16 {
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Self::regs_gp16().ccr(channel.raw()).read().ccr()
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}
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2023-07-28 15:29:27 +02:00
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}
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|
2023-09-30 18:14:20 +02:00
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pub trait ComplementaryCaptureCompare16bitInstance: CaptureCompare16bitInstance + AdvancedControlInstance {
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fn set_complementary_output_polarity(&mut self, channel: Channel, polarity: OutputPolarity) {
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Self::regs_advanced()
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.ccer()
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.modify(|w| w.set_ccnp(channel.raw(), polarity.into()));
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}
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2023-08-18 16:37:44 +02:00
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2023-09-30 18:14:20 +02:00
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fn set_dead_time_clock_division(&mut self, value: vals::Ckd) {
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Self::regs_advanced().cr1().modify(|w| w.set_ckd(value));
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}
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2023-07-28 15:29:27 +02:00
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2023-09-30 18:14:20 +02:00
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fn set_dead_time_value(&mut self, value: u8) {
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|
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Self::regs_advanced().bdtr().modify(|w| w.set_dtg(value));
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}
|
2023-07-28 15:29:27 +02:00
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|
2023-09-30 18:14:20 +02:00
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fn enable_complementary_channel(&mut self, channel: Channel, enable: bool) {
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Self::regs_advanced()
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.ccer()
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.modify(|w| w.set_ccne(channel.raw(), enable));
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|
}
|
2023-07-28 15:29:27 +02:00
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}
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|
2023-09-30 17:19:09 +02:00
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|
|
pub trait CaptureCompare32bitInstance: GeneralPurpose32bitInstance + CaptureCompare16bitInstance {
|
2023-09-30 18:14:20 +02:00
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|
fn set_compare_value(&mut self, channel: Channel, value: u32) {
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|
|
|
Self::regs_gp32().ccr(channel.raw()).modify(|w| w.set_ccr(value));
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|
}
|
2023-07-28 15:29:27 +02:00
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|
2023-09-30 18:14:20 +02:00
|
|
|
fn get_capture_value(&mut self, channel: Channel) -> u32 {
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|
|
|
Self::regs_gp32().ccr(channel.raw()).read().ccr()
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|
|
|
}
|
2023-09-28 02:15:24 +02:00
|
|
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|
2023-09-30 18:14:20 +02:00
|
|
|
fn get_max_compare_value(&self) -> u32 {
|
2023-09-30 18:22:52 +02:00
|
|
|
Self::regs_gp32().arr().read().arr()
|
2023-09-30 18:14:20 +02:00
|
|
|
}
|
2023-10-07 00:57:19 +02:00
|
|
|
|
|
|
|
fn get_compare_value(&self, channel: Channel) -> u32 {
|
|
|
|
Self::regs_gp32().ccr(channel.raw()).read().ccr()
|
|
|
|
}
|
2023-07-28 15:29:27 +02:00
|
|
|
}
|
|
|
|
}
|
|
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|
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|
|
#[derive(Clone, Copy)]
|
|
|
|
pub enum Channel {
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|
|
|
Ch1,
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|
Ch2,
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|
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|
Ch3,
|
|
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|
Ch4,
|
2021-12-08 17:36:40 +01:00
|
|
|
}
|
|
|
|
|
2023-07-28 15:29:27 +02:00
|
|
|
impl Channel {
|
|
|
|
pub fn raw(&self) -> usize {
|
|
|
|
match self {
|
|
|
|
Channel::Ch1 => 0,
|
|
|
|
Channel::Ch2 => 1,
|
|
|
|
Channel::Ch3 => 2,
|
|
|
|
Channel::Ch4 => 3,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-09-28 02:15:24 +02:00
|
|
|
#[derive(Clone, Copy)]
|
|
|
|
pub enum InputCaptureMode {
|
|
|
|
Rising,
|
|
|
|
Falling,
|
|
|
|
BothEdges,
|
|
|
|
}
|
|
|
|
|
|
|
|
#[derive(Clone, Copy)]
|
|
|
|
pub enum InputTISelection {
|
|
|
|
Normal,
|
|
|
|
Alternate,
|
|
|
|
TRC,
|
|
|
|
}
|
|
|
|
|
|
|
|
impl From<InputTISelection> for stm32_metapac::timer::vals::CcmrInputCcs {
|
|
|
|
fn from(tisel: InputTISelection) -> Self {
|
|
|
|
match tisel {
|
|
|
|
InputTISelection::Normal => stm32_metapac::timer::vals::CcmrInputCcs::TI4,
|
|
|
|
InputTISelection::Alternate => stm32_metapac::timer::vals::CcmrInputCcs::TI3,
|
|
|
|
InputTISelection::TRC => stm32_metapac::timer::vals::CcmrInputCcs::TRC,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-10-02 21:14:44 +02:00
|
|
|
#[repr(u8)]
|
2023-10-01 23:09:01 +02:00
|
|
|
#[derive(Debug, Clone, Copy, PartialEq, Eq, Default)]
|
|
|
|
pub enum CountingMode {
|
|
|
|
#[default]
|
|
|
|
/// The timer counts up to the reload value and then resets back to 0.
|
|
|
|
EdgeAlignedUp,
|
|
|
|
/// The timer counts down to 0 and then resets back to the reload value.
|
|
|
|
EdgeAlignedDown,
|
|
|
|
/// The timer counts up to the reload value and then counts back to 0.
|
|
|
|
///
|
|
|
|
/// The output compare interrupt flags of channels configured in output are
|
|
|
|
/// set when the counter is counting down.
|
|
|
|
CenterAlignedDownInterrupts,
|
|
|
|
/// The timer counts up to the reload value and then counts back to 0.
|
|
|
|
///
|
|
|
|
/// The output compare interrupt flags of channels configured in output are
|
|
|
|
/// set when the counter is counting up.
|
|
|
|
CenterAlignedUpInterrupts,
|
|
|
|
/// The timer counts up to the reload value and then counts back to 0.
|
|
|
|
///
|
|
|
|
/// The output compare interrupt flags of channels configured in output are
|
|
|
|
/// set when the counter is counting both up or down.
|
|
|
|
CenterAlignedBothInterrupts,
|
|
|
|
}
|
|
|
|
|
|
|
|
impl CountingMode {
|
2023-10-02 21:14:44 +02:00
|
|
|
pub fn is_edge_aligned(&self) -> bool {
|
2023-10-01 23:09:01 +02:00
|
|
|
match self {
|
2023-10-02 21:14:44 +02:00
|
|
|
CountingMode::EdgeAlignedUp | CountingMode::EdgeAlignedDown => true,
|
|
|
|
_ => false,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pub fn is_center_aligned(&self) -> bool {
|
|
|
|
match self {
|
|
|
|
CountingMode::CenterAlignedDownInterrupts
|
|
|
|
| CountingMode::CenterAlignedUpInterrupts
|
|
|
|
| CountingMode::CenterAlignedBothInterrupts => true,
|
|
|
|
_ => false,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl From<CountingMode> for (vals::Cms, vals::Dir) {
|
|
|
|
fn from(value: CountingMode) -> Self {
|
|
|
|
match value {
|
2023-10-01 23:09:01 +02:00
|
|
|
CountingMode::EdgeAlignedUp => (vals::Cms::EDGEALIGNED, vals::Dir::UP),
|
|
|
|
CountingMode::EdgeAlignedDown => (vals::Cms::EDGEALIGNED, vals::Dir::DOWN),
|
|
|
|
CountingMode::CenterAlignedDownInterrupts => (vals::Cms::CENTERALIGNED1, vals::Dir::UP),
|
|
|
|
CountingMode::CenterAlignedUpInterrupts => (vals::Cms::CENTERALIGNED2, vals::Dir::UP),
|
|
|
|
CountingMode::CenterAlignedBothInterrupts => (vals::Cms::CENTERALIGNED3, vals::Dir::UP),
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-10-02 21:14:44 +02:00
|
|
|
impl From<(vals::Cms, vals::Dir)> for CountingMode {
|
|
|
|
fn from(value: (vals::Cms, vals::Dir)) -> Self {
|
|
|
|
match value {
|
|
|
|
(vals::Cms::EDGEALIGNED, vals::Dir::UP) => CountingMode::EdgeAlignedUp,
|
|
|
|
(vals::Cms::EDGEALIGNED, vals::Dir::DOWN) => CountingMode::EdgeAlignedDown,
|
|
|
|
(vals::Cms::CENTERALIGNED1, _) => CountingMode::CenterAlignedDownInterrupts,
|
|
|
|
(vals::Cms::CENTERALIGNED2, _) => CountingMode::CenterAlignedUpInterrupts,
|
|
|
|
(vals::Cms::CENTERALIGNED3, _) => CountingMode::CenterAlignedBothInterrupts,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-07-28 15:29:27 +02:00
|
|
|
#[derive(Clone, Copy)]
|
|
|
|
pub enum OutputCompareMode {
|
|
|
|
Frozen,
|
|
|
|
ActiveOnMatch,
|
|
|
|
InactiveOnMatch,
|
|
|
|
Toggle,
|
|
|
|
ForceInactive,
|
|
|
|
ForceActive,
|
|
|
|
PwmMode1,
|
|
|
|
PwmMode2,
|
|
|
|
}
|
|
|
|
|
|
|
|
impl From<OutputCompareMode> for stm32_metapac::timer::vals::Ocm {
|
|
|
|
fn from(mode: OutputCompareMode) -> Self {
|
|
|
|
match mode {
|
|
|
|
OutputCompareMode::Frozen => stm32_metapac::timer::vals::Ocm::FROZEN,
|
|
|
|
OutputCompareMode::ActiveOnMatch => stm32_metapac::timer::vals::Ocm::ACTIVEONMATCH,
|
|
|
|
OutputCompareMode::InactiveOnMatch => stm32_metapac::timer::vals::Ocm::INACTIVEONMATCH,
|
|
|
|
OutputCompareMode::Toggle => stm32_metapac::timer::vals::Ocm::TOGGLE,
|
|
|
|
OutputCompareMode::ForceInactive => stm32_metapac::timer::vals::Ocm::FORCEINACTIVE,
|
|
|
|
OutputCompareMode::ForceActive => stm32_metapac::timer::vals::Ocm::FORCEACTIVE,
|
|
|
|
OutputCompareMode::PwmMode1 => stm32_metapac::timer::vals::Ocm::PWMMODE1,
|
|
|
|
OutputCompareMode::PwmMode2 => stm32_metapac::timer::vals::Ocm::PWMMODE2,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-08-18 16:37:44 +02:00
|
|
|
#[derive(Clone, Copy)]
|
|
|
|
pub enum OutputPolarity {
|
|
|
|
ActiveHigh,
|
|
|
|
ActiveLow,
|
|
|
|
}
|
|
|
|
|
|
|
|
impl From<OutputPolarity> for bool {
|
|
|
|
fn from(mode: OutputPolarity) -> Self {
|
|
|
|
match mode {
|
|
|
|
OutputPolarity::ActiveHigh => false,
|
|
|
|
OutputPolarity::ActiveLow => true,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-07-28 15:29:27 +02:00
|
|
|
pub trait Basic16bitInstance: sealed::Basic16bitInstance + 'static {}
|
|
|
|
|
2021-12-08 17:36:40 +01:00
|
|
|
pub trait GeneralPurpose16bitInstance: sealed::GeneralPurpose16bitInstance + 'static {}
|
|
|
|
|
|
|
|
pub trait GeneralPurpose32bitInstance: sealed::GeneralPurpose32bitInstance + 'static {}
|
|
|
|
|
|
|
|
pub trait AdvancedControlInstance: sealed::AdvancedControlInstance + 'static {}
|
|
|
|
|
2023-07-28 15:29:27 +02:00
|
|
|
pub trait CaptureCompare16bitInstance:
|
|
|
|
sealed::CaptureCompare16bitInstance + GeneralPurpose16bitInstance + 'static
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
pub trait ComplementaryCaptureCompare16bitInstance:
|
|
|
|
sealed::ComplementaryCaptureCompare16bitInstance + AdvancedControlInstance + 'static
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
pub trait CaptureCompare32bitInstance:
|
|
|
|
sealed::CaptureCompare32bitInstance + CaptureCompare16bitInstance + GeneralPurpose32bitInstance + 'static
|
|
|
|
{
|
|
|
|
}
|
2023-09-30 17:36:32 +02:00
|
|
|
|
2023-07-28 15:29:27 +02:00
|
|
|
pin_trait!(Channel1Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(Channel1ComplementaryPin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(Channel2Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(Channel2ComplementaryPin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(Channel3Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(Channel3ComplementaryPin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(Channel4Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(Channel4ComplementaryPin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(ExternalTriggerPin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(BreakInputPin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(BreakInputComparator1Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(BreakInputComparator2Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(BreakInput2Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(BreakInput2Comparator1Pin, CaptureCompare16bitInstance);
|
|
|
|
pin_trait!(BreakInput2Comparator2Pin, CaptureCompare16bitInstance);
|
2021-12-08 17:36:40 +01:00
|
|
|
|
|
|
|
#[allow(unused)]
|
|
|
|
macro_rules! impl_basic_16bit_timer {
|
|
|
|
($inst:ident, $irq:ident) => {
|
|
|
|
impl sealed::Basic16bitInstance for crate::peripherals::$inst {
|
2023-06-08 16:08:40 +02:00
|
|
|
type Interrupt = crate::interrupt::typelevel::$irq;
|
2021-12-08 17:36:40 +01:00
|
|
|
|
2022-02-28 16:20:42 +01:00
|
|
|
fn regs() -> crate::pac::timer::TimBasic {
|
2023-06-19 03:07:26 +02:00
|
|
|
unsafe { crate::pac::timer::TimBasic::from_ptr(crate::pac::$inst.as_ptr()) }
|
2021-12-08 17:36:40 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
#[allow(unused)]
|
|
|
|
macro_rules! impl_32bit_timer {
|
|
|
|
($inst:ident) => {
|
|
|
|
impl sealed::GeneralPurpose32bitInstance for crate::peripherals::$inst {
|
2022-02-28 16:20:42 +01:00
|
|
|
fn regs_gp32() -> crate::pac::timer::TimGp32 {
|
2021-12-08 17:36:40 +01:00
|
|
|
crate::pac::$inst
|
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
2023-07-28 15:29:27 +02:00
|
|
|
#[allow(unused)]
|
|
|
|
macro_rules! impl_compare_capable_16bit {
|
|
|
|
($inst:ident) => {
|
2023-10-13 17:38:40 +02:00
|
|
|
impl sealed::CaptureCompare16bitInstance for crate::peripherals::$inst {
|
2023-10-13 18:50:54 +02:00
|
|
|
fn enable_outputs(&mut self) {}
|
2023-10-13 17:38:40 +02:00
|
|
|
}
|
2023-07-28 15:29:27 +02:00
|
|
|
};
|
|
|
|
}
|
|
|
|
|
2022-02-26 01:40:43 +01:00
|
|
|
foreach_interrupt! {
|
2021-12-08 17:36:40 +01:00
|
|
|
($inst:ident, timer, TIM_BASIC, UP, $irq:ident) => {
|
|
|
|
impl_basic_16bit_timer!($inst, $irq);
|
2023-07-28 15:29:27 +02:00
|
|
|
impl Basic16bitInstance for crate::peripherals::$inst {}
|
2021-12-08 17:36:40 +01:00
|
|
|
};
|
|
|
|
($inst:ident, timer, TIM_GP16, UP, $irq:ident) => {
|
|
|
|
impl_basic_16bit_timer!($inst, $irq);
|
2023-07-28 15:29:27 +02:00
|
|
|
impl_compare_capable_16bit!($inst);
|
|
|
|
impl Basic16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl GeneralPurpose16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl CaptureCompare16bitInstance for crate::peripherals::$inst {}
|
2021-12-08 17:36:40 +01:00
|
|
|
|
|
|
|
impl sealed::GeneralPurpose16bitInstance for crate::peripherals::$inst {
|
2022-02-28 16:20:42 +01:00
|
|
|
fn regs_gp16() -> crate::pac::timer::TimGp16 {
|
2021-12-08 17:36:40 +01:00
|
|
|
crate::pac::$inst
|
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
($inst:ident, timer, TIM_GP32, UP, $irq:ident) => {
|
|
|
|
impl_basic_16bit_timer!($inst, $irq);
|
2023-07-28 15:29:27 +02:00
|
|
|
impl_32bit_timer!($inst);
|
|
|
|
impl_compare_capable_16bit!($inst);
|
|
|
|
impl Basic16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl CaptureCompare16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl CaptureCompare32bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl GeneralPurpose16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl GeneralPurpose32bitInstance for crate::peripherals::$inst {}
|
2023-09-30 18:14:20 +02:00
|
|
|
impl sealed::CaptureCompare32bitInstance for crate::peripherals::$inst {}
|
2021-12-08 17:36:40 +01:00
|
|
|
|
|
|
|
impl sealed::GeneralPurpose16bitInstance for crate::peripherals::$inst {
|
2022-02-28 16:20:42 +01:00
|
|
|
fn regs_gp16() -> crate::pac::timer::TimGp16 {
|
2023-06-19 03:07:26 +02:00
|
|
|
unsafe { crate::pac::timer::TimGp16::from_ptr(crate::pac::$inst.as_ptr()) }
|
2021-12-08 17:36:40 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
($inst:ident, timer, TIM_ADV, UP, $irq:ident) => {
|
|
|
|
impl_basic_16bit_timer!($inst, $irq);
|
|
|
|
|
2023-07-28 15:29:27 +02:00
|
|
|
impl Basic16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl GeneralPurpose16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl CaptureCompare16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl ComplementaryCaptureCompare16bitInstance for crate::peripherals::$inst {}
|
|
|
|
impl AdvancedControlInstance for crate::peripherals::$inst {}
|
2023-10-13 17:38:40 +02:00
|
|
|
impl sealed::CaptureCompare16bitInstance for crate::peripherals::$inst {
|
2023-10-13 18:50:54 +02:00
|
|
|
fn enable_outputs(&mut self) {
|
2023-10-13 17:38:40 +02:00
|
|
|
use crate::timer::sealed::AdvancedControlInstance;
|
|
|
|
let r = Self::regs_advanced();
|
2023-10-13 18:50:54 +02:00
|
|
|
r.bdtr().modify(|w| w.set_moe(true));
|
2023-10-13 17:38:40 +02:00
|
|
|
}
|
|
|
|
}
|
2023-09-30 18:14:20 +02:00
|
|
|
impl sealed::ComplementaryCaptureCompare16bitInstance for crate::peripherals::$inst {}
|
2022-07-12 14:06:16 +02:00
|
|
|
impl sealed::GeneralPurpose16bitInstance for crate::peripherals::$inst {
|
|
|
|
fn regs_gp16() -> crate::pac::timer::TimGp16 {
|
2023-06-19 03:07:26 +02:00
|
|
|
unsafe { crate::pac::timer::TimGp16::from_ptr(crate::pac::$inst.as_ptr()) }
|
2022-07-12 14:06:16 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-12-08 17:36:40 +01:00
|
|
|
impl sealed::AdvancedControlInstance for crate::peripherals::$inst {
|
2022-02-28 16:20:42 +01:00
|
|
|
fn regs_advanced() -> crate::pac::timer::TimAdv {
|
2021-12-08 17:36:40 +01:00
|
|
|
crate::pac::$inst
|
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
}
|