2023-05-30 00:10:36 +02:00
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#![macro_use]
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pub use defmt::*;
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#[allow(unused)]
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use embassy_stm32::time::Hertz;
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use embassy_stm32::Config;
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use {defmt_rtt as _, panic_probe as _};
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#[cfg(feature = "stm32f103c8")]
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teleprobe_meta::target!(b"bluepill-stm32f103c8");
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#[cfg(feature = "stm32g491re")]
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teleprobe_meta::target!(b"nucleo-stm32g491re");
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#[cfg(feature = "stm32g071rb")]
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teleprobe_meta::target!(b"nucleo-stm32g071rb");
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#[cfg(feature = "stm32f429zi")]
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teleprobe_meta::target!(b"nucleo-stm32f429zi");
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#[cfg(feature = "stm32wb55rg")]
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teleprobe_meta::target!(b"nucleo-stm32wb55rg");
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#[cfg(feature = "stm32h755zi")]
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teleprobe_meta::target!(b"nucleo-stm32h755zi");
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#[cfg(feature = "stm32u585ai")]
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teleprobe_meta::target!(b"iot-stm32u585ai");
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#[cfg(feature = "stm32h563zi")]
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teleprobe_meta::target!(b"nucleo-stm32h563zi");
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#[cfg(feature = "stm32c031c6")]
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teleprobe_meta::target!(b"nucleo-stm32c031c6");
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pub fn config() -> Config {
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#[allow(unused_mut)]
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let mut config = Config::default();
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#[cfg(feature = "stm32h755zi")]
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{
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2023-09-19 04:22:57 +02:00
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use embassy_stm32::rcc::*;
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config.rcc.hsi = Some(Hsi::Mhz64);
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config.rcc.csi = true;
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config.rcc.pll_src = PllSource::Hsi;
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config.rcc.pll1 = Some(Pll {
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prediv: 4,
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mul: 50,
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divp: Some(2),
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divq: Some(8), // SPI1 cksel defaults to pll1_q
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divr: None,
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});
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config.rcc.pll2 = Some(Pll {
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prediv: 4,
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mul: 50,
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divp: Some(8), // 100mhz
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divq: None,
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divr: None,
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});
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config.rcc.sys = Sysclk::Pll1P; // 400 Mhz
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config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz
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config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz
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config.rcc.voltage_scale = VoltageScale::Scale1;
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config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
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2023-05-30 00:10:36 +02:00
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}
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#[cfg(feature = "stm32u585ai")]
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{
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config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz);
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}
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config
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}
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