2023-04-21 08:20:46 +02:00
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//! This example runs on a STM32WL board, which has a builtin Semtech Sx1262 radio.
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//! It demonstrates LORA P2P send functionality.
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#![no_std]
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#![no_main]
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#![macro_use]
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#![feature(type_alias_impl_trait, async_fn_in_trait)]
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2023-11-01 04:56:56 +01:00
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#![allow(stable_features, unknown_lints, async_fn_in_trait)]
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2023-04-21 08:20:46 +02:00
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use defmt::info;
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use embassy_executor::Spawner;
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2023-05-25 01:09:04 +02:00
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use embassy_lora::iv::{InterruptHandler, Stm32wlInterfaceVariant};
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use embassy_stm32::bind_interrupts;
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2023-04-21 08:20:46 +02:00
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use embassy_stm32::gpio::{Level, Output, Pin, Speed};
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2023-05-04 04:05:47 +02:00
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use embassy_stm32::spi::Spi;
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2023-10-23 01:09:36 +02:00
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use embassy_stm32::time::Hertz;
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2023-04-21 08:20:46 +02:00
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use embassy_time::Delay;
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use lora_phy::mod_params::*;
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use lora_phy::sx1261_2::SX1261_2;
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use lora_phy::LoRa;
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use {defmt_rtt as _, panic_probe as _};
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2023-04-24 01:32:34 +02:00
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const LORA_FREQUENCY_IN_HZ: u32 = 903_900_000; // warning: set this appropriately for the region
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2023-05-25 01:09:04 +02:00
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bind_interrupts!(struct Irqs{
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SUBGHZ_RADIO => InterruptHandler;
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});
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2023-04-21 08:20:46 +02:00
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let mut config = embassy_stm32::Config::default();
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2023-10-23 01:09:36 +02:00
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{
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use embassy_stm32::rcc::*;
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config.rcc.hse = Some(Hse {
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freq: Hertz(32_000_000),
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mode: HseMode::Bypass,
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prescaler: HsePrescaler::DIV1,
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});
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config.rcc.mux = ClockSrc::PLL1_R;
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config.rcc.pll = Some(Pll {
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source: PLLSource::HSE,
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prediv: PllPreDiv::DIV2,
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mul: PllMul::MUL6,
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divp: None,
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divq: Some(PllQDiv::DIV2), // PLL1_Q clock (32 / 2 * 6 / 2), used for RNG
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divr: Some(PllRDiv::DIV2), // sysclk 48Mhz clock (32 / 2 * 6 / 2)
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});
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}
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2023-04-21 08:20:46 +02:00
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let p = embassy_stm32::init(config);
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2023-05-04 16:45:18 +02:00
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let spi = Spi::new_subghz(p.SUBGHZSPI, p.DMA1_CH1, p.DMA1_CH2);
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2023-04-21 08:20:46 +02:00
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// Set CTRL1 and CTRL3 for high-power transmission, while CTRL2 acts as an RF switch between tx and rx
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let _ctrl1 = Output::new(p.PC4.degrade(), Level::Low, Speed::High);
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let ctrl2 = Output::new(p.PC5.degrade(), Level::High, Speed::High);
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let _ctrl3 = Output::new(p.PC3.degrade(), Level::High, Speed::High);
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2023-05-25 01:09:04 +02:00
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let iv = Stm32wlInterfaceVariant::new(Irqs, None, Some(ctrl2)).unwrap();
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2023-04-21 08:20:46 +02:00
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let mut lora = {
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2023-09-24 17:33:03 +02:00
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match LoRa::new(SX1261_2::new(BoardType::Stm32wlSx1262, spi, iv), false, Delay).await {
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2023-04-21 08:20:46 +02:00
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Ok(l) => l,
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Err(err) => {
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info!("Radio error = {}", err);
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return;
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}
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}
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};
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let mdltn_params = {
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2023-04-24 01:32:34 +02:00
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match lora.create_modulation_params(
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SpreadingFactor::_10,
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Bandwidth::_250KHz,
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CodingRate::_4_8,
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LORA_FREQUENCY_IN_HZ,
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) {
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2023-04-21 08:20:46 +02:00
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Ok(mp) => mp,
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Err(err) => {
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info!("Radio error = {}", err);
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return;
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}
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}
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};
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let mut tx_pkt_params = {
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match lora.create_tx_packet_params(4, false, true, false, &mdltn_params) {
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Ok(pp) => pp,
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Err(err) => {
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info!("Radio error = {}", err);
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return;
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}
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}
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};
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match lora.prepare_for_tx(&mdltn_params, 20, false).await {
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Ok(()) => {}
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Err(err) => {
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info!("Radio error = {}", err);
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return;
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}
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};
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let buffer = [0x01u8, 0x02u8, 0x03u8];
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match lora.tx(&mdltn_params, &mut tx_pkt_params, &buffer, 0xffffff).await {
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Ok(()) => {
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info!("TX DONE");
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}
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Err(err) => {
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info!("Radio error = {}", err);
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return;
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}
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};
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2023-09-24 17:33:03 +02:00
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match lora.sleep(false).await {
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2023-04-21 08:20:46 +02:00
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Ok(()) => info!("Sleep successful"),
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Err(err) => info!("Sleep unsuccessful = {}", err),
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}
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}
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