2023-02-21 08:52:57 +01:00
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#![no_std]
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2022-07-10 19:45:26 +02:00
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#![no_main]
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2022-10-02 21:28:34 +02:00
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#![feature(type_alias_impl_trait)]
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2022-12-01 22:09:45 +01:00
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#![feature(async_fn_in_trait)]
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#![allow(incomplete_features)]
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2022-07-10 19:45:26 +02:00
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2022-07-15 18:33:32 +02:00
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use core::convert::Infallible;
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2022-07-10 19:45:26 +02:00
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2022-08-13 15:37:30 +02:00
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use defmt::*;
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2022-08-22 17:24:43 +02:00
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use embassy_executor::Spawner;
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2022-07-12 07:52:16 +02:00
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use embassy_net::tcp::TcpSocket;
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2023-02-15 04:08:27 +01:00
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use embassy_net::{Config, Stack, StackResources};
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2022-08-13 15:37:30 +02:00
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use embassy_rp::gpio::{Flex, Level, Output};
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2022-07-11 00:25:35 +02:00
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use embassy_rp::peripherals::{PIN_23, PIN_24, PIN_25, PIN_29};
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2022-07-15 18:33:32 +02:00
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use embedded_hal_1::spi::ErrorType;
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use embedded_hal_async::spi::{ExclusiveDevice, SpiBusFlush, SpiBusRead, SpiBusWrite};
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2022-11-07 22:51:58 +01:00
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use embedded_io::asynch::Write;
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2022-08-22 17:24:43 +02:00
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use static_cell::StaticCell;
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2022-07-10 19:45:26 +02:00
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use {defmt_rtt as _, panic_probe as _};
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2023-02-21 08:52:57 +01:00
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use core::str::from_utf8;
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2023-02-20 21:03:39 +01:00
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2022-08-22 17:24:43 +02:00
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macro_rules! singleton {
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2022-07-10 19:45:26 +02:00
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($val:expr) => {{
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type T = impl Sized;
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2022-08-22 17:24:43 +02:00
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static STATIC_CELL: StaticCell<T> = StaticCell::new();
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STATIC_CELL.init_with(move || $val)
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2022-07-10 19:45:26 +02:00
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}};
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}
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2022-08-13 15:37:30 +02:00
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#[embassy_executor::task]
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2022-07-15 18:33:32 +02:00
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async fn wifi_task(
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runner: cyw43::Runner<'static, Output<'static, PIN_23>, ExclusiveDevice<MySpi, Output<'static, PIN_25>>>,
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) -> ! {
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2022-07-11 00:25:35 +02:00
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runner.run().await
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}
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2022-08-13 15:37:30 +02:00
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#[embassy_executor::task]
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2022-12-27 01:19:26 +01:00
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async fn net_task(stack: &'static Stack<cyw43::NetDriver<'static>>) -> ! {
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2022-07-12 07:52:16 +02:00
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stack.run().await
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}
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2022-08-13 15:37:30 +02:00
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#[embassy_executor::main]
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2022-08-22 17:24:43 +02:00
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async fn main(spawner: Spawner) {
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2022-07-10 19:45:26 +02:00
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info!("Hello World!");
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2022-08-22 17:24:43 +02:00
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let p = embassy_rp::init(Default::default());
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2022-08-20 10:49:27 +02:00
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// Include the WiFi firmware and Country Locale Matrix (CLM) blobs.
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2022-11-07 22:44:20 +01:00
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let fw = include_bytes!("../../../firmware/43439A0.bin");
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let clm = include_bytes!("../../../firmware/43439A0_clm.bin");
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2022-07-17 00:33:30 +02:00
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// To make flashing faster for development, you may want to flash the firmwares independently
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// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
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// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs-cli download 43439A0.clm_blob --format bin --chip RP2040 --base-address 0x10140000
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2022-11-07 22:44:20 +01:00
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//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
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//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };
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2022-07-17 00:33:30 +02:00
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2022-07-15 18:33:32 +02:00
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let pwr = Output::new(p.PIN_23, Level::Low);
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let cs = Output::new(p.PIN_25, Level::High);
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let clk = Output::new(p.PIN_29, Level::Low);
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let mut dio = Flex::new(p.PIN_24);
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dio.set_low();
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dio.set_as_output();
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let bus = MySpi { clk, dio };
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let spi = ExclusiveDevice::new(bus, cs);
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2022-07-10 19:45:26 +02:00
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2022-08-22 17:24:43 +02:00
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let state = singleton!(cyw43::State::new());
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2022-12-27 01:19:26 +01:00
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let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await;
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2022-07-10 19:45:26 +02:00
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2022-07-11 00:25:35 +02:00
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spawner.spawn(wifi_task(runner)).unwrap();
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2022-07-10 19:45:26 +02:00
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2023-01-02 21:36:17 +01:00
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control.init(clm).await;
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control
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.set_power_management(cyw43::PowerManagementMode::PowerSave)
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.await;
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2022-07-12 07:52:16 +02:00
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2022-07-21 23:50:40 +02:00
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//control.join_open(env!("WIFI_NETWORK")).await;
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control.join_wpa2(env!("WIFI_NETWORK"), env!("WIFI_PASSWORD")).await;
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2022-07-12 07:52:16 +02:00
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2023-02-15 04:08:27 +01:00
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let config = Config::Dhcp(Default::default());
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//let config = embassy_net::Config::Static(embassy_net::Config {
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2022-07-12 07:52:16 +02:00
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// address: Ipv4Cidr::new(Ipv4Address::new(192, 168, 69, 2), 24),
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// dns_servers: Vec::new(),
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// gateway: Some(Ipv4Address::new(192, 168, 69, 1)),
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//});
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// Generate random seed
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let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random.
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// Init network stack
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2022-08-22 17:24:43 +02:00
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let stack = &*singleton!(Stack::new(
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2022-07-12 07:52:16 +02:00
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net_device,
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config,
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2023-02-15 04:08:27 +01:00
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singleton!(StackResources::<2>::new()),
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2022-07-12 07:52:16 +02:00
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seed
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));
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unwrap!(spawner.spawn(net_task(stack)));
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// And now we can use it!
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let mut rx_buffer = [0; 4096];
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let mut tx_buffer = [0; 4096];
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let mut buf = [0; 4096];
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loop {
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let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer);
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socket.set_timeout(Some(embassy_net::SmolDuration::from_secs(10)));
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info!("Listening on TCP:1234...");
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if let Err(e) = socket.accept(1234).await {
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warn!("accept error: {:?}", e);
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continue;
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}
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info!("Received connection from {:?}", socket.remote_endpoint());
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loop {
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let n = match socket.read(&mut buf).await {
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Ok(0) => {
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warn!("read EOF");
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break;
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}
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Ok(n) => n,
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Err(e) => {
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warn!("read error: {:?}", e);
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break;
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}
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};
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2023-02-21 08:52:57 +01:00
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info!("rxd {}", from_utf8(&buf[..n]).unwrap());
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2023-02-20 21:03:39 +01:00
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2022-07-11 05:19:31 +02:00
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2022-07-12 07:52:16 +02:00
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match socket.write_all(&buf[..n]).await {
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Ok(()) => {}
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Err(e) => {
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warn!("write error: {:?}", e);
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break;
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}
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};
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}
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}
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2022-07-10 19:45:26 +02:00
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}
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2022-07-15 18:33:32 +02:00
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struct MySpi {
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/// SPI clock
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clk: Output<'static, PIN_29>,
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/// 4 signals, all in one!!
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/// - SPI MISO
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/// - SPI MOSI
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/// - IRQ
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/// - strap to set to gSPI mode on boot.
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dio: Flex<'static, PIN_24>,
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}
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impl ErrorType for MySpi {
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type Error = Infallible;
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}
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2023-02-19 16:31:33 +01:00
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impl cyw43::SpiBusCyw43<u32> for MySpi {
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async fn cmd_write<'a>(&'a mut self, write: &'a [u32]) -> Result<(), Self::Error> {
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self.write(write).await
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}
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async fn cmd_read<'a>(&'a mut self, write: &'a [u32], read: &'a mut [u32]) -> Result<(), Self::Error> {
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self.write(write).await?;
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self.read(read).await
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}
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}
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2022-07-15 18:33:32 +02:00
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impl SpiBusFlush for MySpi {
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2022-12-01 22:09:45 +01:00
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async fn flush(&mut self) -> Result<(), Self::Error> {
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Ok(())
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2022-07-15 18:33:32 +02:00
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}
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}
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2022-07-16 18:06:57 +02:00
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impl SpiBusRead<u32> for MySpi {
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2022-12-01 22:09:45 +01:00
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async fn read(&mut self, words: &mut [u32]) -> Result<(), Self::Error> {
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self.dio.set_as_input();
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for word in words {
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let mut w = 0;
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for _ in 0..32 {
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w = w << 1;
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// rising edge, sample data
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if self.dio.is_high() {
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w |= 0x01;
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2022-07-15 18:33:32 +02:00
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}
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2022-12-01 22:09:45 +01:00
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self.clk.set_high();
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2022-07-15 18:33:32 +02:00
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2022-12-01 22:09:45 +01:00
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// falling edge
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self.clk.set_low();
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}
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*word = w
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2022-07-15 18:33:32 +02:00
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}
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2022-12-01 22:09:45 +01:00
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Ok(())
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2022-07-15 18:33:32 +02:00
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}
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}
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2022-07-16 18:06:57 +02:00
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impl SpiBusWrite<u32> for MySpi {
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2022-12-01 22:09:45 +01:00
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async fn write(&mut self, words: &[u32]) -> Result<(), Self::Error> {
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self.dio.set_as_output();
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for word in words {
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let mut word = *word;
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for _ in 0..32 {
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// falling edge, setup data
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self.clk.set_low();
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if word & 0x8000_0000 == 0 {
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self.dio.set_low();
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} else {
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self.dio.set_high();
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2022-07-15 18:33:32 +02:00
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}
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2022-12-01 22:09:45 +01:00
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// rising edge
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self.clk.set_high();
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word = word << 1;
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}
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2022-07-15 18:33:32 +02:00
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}
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2022-12-01 22:09:45 +01:00
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self.clk.set_low();
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self.dio.set_as_input();
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Ok(())
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2022-07-15 18:33:32 +02:00
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}
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}
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