2023-05-29 21:49:43 +02:00
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#![cfg_attr(not(test), no_std)]
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2023-05-14 23:44:53 +02:00
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#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
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2021-03-19 21:26:20 +01:00
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2021-04-23 23:47:34 +02:00
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// This must go FIRST so that all the other modules see its macros.
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2021-03-19 21:26:20 +01:00
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pub mod fmt;
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2022-03-04 17:42:38 +01:00
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include!(concat!(env!("OUT_DIR"), "/_macros.rs"));
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2021-03-19 21:26:20 +01:00
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2021-05-25 04:17:24 +02:00
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// Utilities
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pub mod time;
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2022-02-10 21:38:03 +01:00
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mod traits;
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2021-05-25 04:17:24 +02:00
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// Always-present hardware
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2021-07-15 05:42:06 +02:00
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pub mod dma;
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2021-04-06 01:31:29 +02:00
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pub mod gpio;
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2021-05-25 04:17:24 +02:00
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pub mod rcc;
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2021-08-04 12:05:22 +02:00
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#[cfg(feature = "_time-driver")]
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2021-08-03 22:08:13 +02:00
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mod time_driver;
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2021-12-08 17:36:40 +01:00
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pub mod timer;
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2021-05-25 04:17:24 +02:00
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// Sometimes-present hardware
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2021-07-08 20:55:27 +02:00
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2021-06-10 21:33:43 +02:00
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#[cfg(adc)]
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pub mod adc;
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2021-08-06 11:59:16 +02:00
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#[cfg(can)]
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pub mod can;
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2021-05-28 19:31:40 +02:00
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#[cfg(dac)]
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pub mod dac;
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2021-11-10 14:47:16 +01:00
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#[cfg(dcmi)]
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pub mod dcmi;
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2022-05-04 20:48:37 +02:00
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#[cfg(eth)]
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2021-06-07 07:30:38 +02:00
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pub mod eth;
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2022-01-12 12:43:24 +01:00
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#[cfg(feature = "exti")]
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2021-06-25 00:36:42 +02:00
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pub mod exti;
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2022-02-08 14:32:18 +01:00
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#[cfg(fmc)]
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pub mod fmc;
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2021-05-25 04:17:24 +02:00
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#[cfg(i2c)]
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2021-05-24 17:41:37 +02:00
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pub mod i2c;
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2021-07-30 20:06:10 +02:00
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2021-09-27 01:46:17 +02:00
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#[cfg(crc)]
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pub mod crc;
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2022-04-20 13:49:59 +02:00
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pub mod flash;
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2023-05-04 01:17:57 +02:00
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#[cfg(all(spi_v1, rcc_f4))]
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pub mod i2s;
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2021-11-27 03:05:10 +01:00
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pub mod pwm;
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2023-03-22 08:44:58 +01:00
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#[cfg(quadspi)]
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pub mod qspi;
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2021-05-25 04:17:24 +02:00
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#[cfg(rng)]
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2021-04-26 20:11:46 +02:00
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pub mod rng;
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2023-04-18 02:07:58 +02:00
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#[cfg(all(rtc, not(rtc_v1)))]
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2022-09-29 07:49:32 +02:00
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pub mod rtc;
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2021-05-25 04:17:24 +02:00
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#[cfg(sdmmc)]
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2021-05-17 02:04:51 +02:00
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pub mod sdmmc;
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2021-05-25 04:17:24 +02:00
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#[cfg(spi)]
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2021-05-10 21:21:57 +02:00
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pub mod spi;
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2023-05-02 13:16:48 +02:00
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#[cfg(stm32wb)]
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pub mod tl_mbox;
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2021-05-25 04:17:24 +02:00
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#[cfg(usart)]
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2021-05-06 03:59:16 +02:00
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pub mod usart;
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2023-05-19 15:20:37 +02:00
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#[cfg(usb)]
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2022-05-30 00:36:30 +02:00
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pub mod usb;
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2023-01-11 17:51:30 +01:00
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#[cfg(otg)]
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2022-02-09 01:02:23 +01:00
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pub mod usb_otg;
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2022-06-10 16:10:54 +02:00
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#[cfg(iwdg)]
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pub mod wdg;
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2021-05-25 04:17:24 +02:00
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// This must go last, so that it sees all the impl_foo! macros defined earlier.
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2022-03-04 17:42:38 +01:00
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pub(crate) mod _generated {
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2021-05-25 04:17:24 +02:00
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#![allow(dead_code)]
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#![allow(unused_imports)]
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#![allow(non_snake_case)]
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2021-05-10 21:21:57 +02:00
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2022-03-04 17:42:38 +01:00
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include!(concat!(env!("OUT_DIR"), "/_generated.rs"));
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2021-05-25 04:17:24 +02:00
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}
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2022-06-11 05:08:57 +02:00
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2023-05-25 00:29:56 +02:00
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pub mod interrupt {
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//! Interrupt definitions and macros to bind them.
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pub use cortex_m::interrupt::{CriticalSection, Mutex};
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pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, InterruptExt, Priority};
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pub use crate::_generated::interrupt::*;
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/// Macro to bind interrupts to handlers.
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///
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/// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`)
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/// and implements the right [`Binding`]s for it. You can pass this struct to drivers to
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/// prove at compile-time that the right interrupts have been bound.
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// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`.
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#[macro_export]
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macro_rules! bind_interrupts {
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($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
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$vis struct $name;
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$(
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#[allow(non_snake_case)]
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#[no_mangle]
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unsafe extern "C" fn $irq() {
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$(
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<$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt();
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)*
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}
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$(
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unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {}
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)*
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)*
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};
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}
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}
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2022-06-11 05:08:57 +02:00
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// Reexports
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2022-03-04 17:42:38 +01:00
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pub use _generated::{peripherals, Peripherals};
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2022-06-11 05:08:57 +02:00
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pub use embassy_cortex_m::executor;
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2022-11-23 10:11:19 +01:00
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use embassy_cortex_m::interrupt::Priority;
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2022-08-17 18:49:55 +02:00
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pub use embassy_cortex_m::interrupt::_export::interrupt;
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2022-07-23 14:00:19 +02:00
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pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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2022-06-11 05:08:57 +02:00
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#[cfg(feature = "unstable-pac")]
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pub use stm32_metapac as pac;
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#[cfg(not(feature = "unstable-pac"))]
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pub(crate) use stm32_metapac as pac;
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2021-05-01 03:07:17 +02:00
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#[non_exhaustive]
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pub struct Config {
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2021-08-04 17:32:39 +02:00
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pub rcc: rcc::Config,
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2022-02-25 01:16:23 +01:00
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#[cfg(dbgmcu)]
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2021-08-19 23:32:22 +02:00
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pub enable_debug_during_sleep: bool,
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2022-11-23 10:11:19 +01:00
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#[cfg(bdma)]
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pub bdma_interrupt_priority: Priority,
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#[cfg(dma)]
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pub dma_interrupt_priority: Priority,
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2023-04-17 00:04:54 +02:00
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#[cfg(gpdma)]
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pub gpdma_interrupt_priority: Priority,
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2021-05-25 17:09:01 +02:00
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}
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2021-05-01 03:07:17 +02:00
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impl Default for Config {
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fn default() -> Self {
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2021-05-25 13:30:42 +02:00
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Self {
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rcc: Default::default(),
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2022-02-25 01:16:23 +01:00
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#[cfg(dbgmcu)]
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2021-08-19 23:32:22 +02:00
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enable_debug_during_sleep: true,
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2022-11-23 10:11:19 +01:00
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#[cfg(bdma)]
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bdma_interrupt_priority: Priority::P0,
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#[cfg(dma)]
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dma_interrupt_priority: Priority::P0,
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2023-04-17 00:04:54 +02:00
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#[cfg(gpdma)]
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gpdma_interrupt_priority: Priority::P0,
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2021-05-25 13:30:42 +02:00
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}
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2021-05-01 03:07:17 +02:00
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}
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}
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/// Initialize embassy.
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2021-05-25 13:30:42 +02:00
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pub fn init(config: Config) -> Peripherals {
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2021-05-01 03:07:17 +02:00
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let p = Peripherals::take();
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unsafe {
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2022-02-25 01:16:23 +01:00
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#[cfg(dbgmcu)]
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2021-08-19 23:32:22 +02:00
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if config.enable_debug_during_sleep {
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2022-01-04 23:58:57 +01:00
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crate::pac::DBGMCU.cr().modify(|cr| {
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2023-01-17 18:54:23 +01:00
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#[cfg(any(dbgmcu_f0, dbgmcu_c0, dbgmcu_g0, dbgmcu_u5))]
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2022-02-26 01:20:42 +01:00
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{
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cr.set_dbg_stop(true);
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cr.set_dbg_standby(true);
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}
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#[cfg(any(
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2022-06-12 22:15:44 +02:00
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dbgmcu_f1, dbgmcu_f2, dbgmcu_f3, dbgmcu_f4, dbgmcu_f7, dbgmcu_g4, dbgmcu_f7, dbgmcu_l0, dbgmcu_l1,
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dbgmcu_l4, dbgmcu_wb, dbgmcu_wl
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2022-02-26 01:20:42 +01:00
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))]
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{
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cr.set_dbg_sleep(true);
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cr.set_dbg_stop(true);
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cr.set_dbg_standby(true);
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}
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#[cfg(dbgmcu_h7)]
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{
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cr.set_d1dbgcken(true);
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cr.set_d3dbgcken(true);
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cr.set_dbgsleep_d1(true);
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cr.set_dbgstby_d1(true);
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cr.set_dbgstop_d1(true);
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2022-01-04 23:58:57 +01:00
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}
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});
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2021-08-19 23:32:22 +02:00
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}
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2021-07-22 20:38:45 +02:00
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gpio::init();
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2022-11-23 10:11:19 +01:00
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dma::init(
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#[cfg(bdma)]
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config.bdma_interrupt_priority,
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#[cfg(dma)]
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config.dma_interrupt_priority,
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2023-04-17 00:04:54 +02:00
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#[cfg(gpdma)]
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config.gpdma_interrupt_priority,
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2022-11-23 10:11:19 +01:00
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);
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2022-01-12 12:43:24 +01:00
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#[cfg(feature = "exti")]
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2021-06-03 20:25:17 +02:00
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exti::init();
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2021-07-06 15:54:55 +02:00
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2021-05-25 13:30:42 +02:00
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rcc::init(config.rcc);
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2021-08-03 22:08:13 +02:00
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// must be after rcc init
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2021-08-04 12:05:22 +02:00
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#[cfg(feature = "_time-driver")]
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2021-08-03 22:08:13 +02:00
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time_driver::init();
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2021-05-01 03:07:17 +02:00
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}
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p
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}
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