242 lines
7.2 KiB
Rust
242 lines
7.2 KiB
Rust
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#![allow(dead_code)]
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#![allow(unused_imports)]
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#![allow(non_snake_case)]
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pub fn GPIO(n: usize) -> gpio::Gpio {
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gpio::Gpio((0x50000000 + 0x400 * n) as _)
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}
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pub const DMA1: dma::Dma = dma::Dma(0x40020000 as _);
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impl_dma_channel!(DMA1_CH0, 0, 0);
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impl_dma_channel!(DMA1_CH1, 0, 1);
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impl_dma_channel!(DMA1_CH2, 0, 2);
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impl_dma_channel!(DMA1_CH3, 0, 3);
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impl_dma_channel!(DMA1_CH4, 0, 4);
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impl_dma_channel!(DMA1_CH5, 0, 5);
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impl_dma_channel!(DMA1_CH6, 0, 6);
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impl_dma_channel!(DMA1_CH7, 0, 7);
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pub const EXTI: exti::Exti = exti::Exti(0x40010400 as _);
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pub const GPIOA: gpio::Gpio = gpio::Gpio(0x50000000 as _);
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impl_gpio_pin!(PA0, 0, 0, EXTI0);
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impl_gpio_pin!(PA1, 0, 1, EXTI1);
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impl_gpio_pin!(PA2, 0, 2, EXTI2);
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impl_gpio_pin!(PA3, 0, 3, EXTI3);
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impl_gpio_pin!(PA4, 0, 4, EXTI4);
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impl_gpio_pin!(PA5, 0, 5, EXTI5);
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impl_gpio_pin!(PA6, 0, 6, EXTI6);
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impl_gpio_pin!(PA7, 0, 7, EXTI7);
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impl_gpio_pin!(PA8, 0, 8, EXTI8);
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impl_gpio_pin!(PA9, 0, 9, EXTI9);
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impl_gpio_pin!(PA10, 0, 10, EXTI10);
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impl_gpio_pin!(PA11, 0, 11, EXTI11);
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impl_gpio_pin!(PA12, 0, 12, EXTI12);
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impl_gpio_pin!(PA13, 0, 13, EXTI13);
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impl_gpio_pin!(PA14, 0, 14, EXTI14);
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impl_gpio_pin!(PA15, 0, 15, EXTI15);
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pub const GPIOB: gpio::Gpio = gpio::Gpio(0x50000400 as _);
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impl_gpio_pin!(PB0, 1, 0, EXTI0);
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impl_gpio_pin!(PB1, 1, 1, EXTI1);
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impl_gpio_pin!(PB2, 1, 2, EXTI2);
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impl_gpio_pin!(PB3, 1, 3, EXTI3);
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impl_gpio_pin!(PB4, 1, 4, EXTI4);
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impl_gpio_pin!(PB5, 1, 5, EXTI5);
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impl_gpio_pin!(PB6, 1, 6, EXTI6);
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impl_gpio_pin!(PB7, 1, 7, EXTI7);
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impl_gpio_pin!(PB8, 1, 8, EXTI8);
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impl_gpio_pin!(PB9, 1, 9, EXTI9);
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impl_gpio_pin!(PB10, 1, 10, EXTI10);
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impl_gpio_pin!(PB11, 1, 11, EXTI11);
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impl_gpio_pin!(PB12, 1, 12, EXTI12);
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impl_gpio_pin!(PB13, 1, 13, EXTI13);
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impl_gpio_pin!(PB14, 1, 14, EXTI14);
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impl_gpio_pin!(PB15, 1, 15, EXTI15);
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pub const GPIOC: gpio::Gpio = gpio::Gpio(0x50000800 as _);
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impl_gpio_pin!(PC0, 2, 0, EXTI0);
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impl_gpio_pin!(PC1, 2, 1, EXTI1);
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impl_gpio_pin!(PC2, 2, 2, EXTI2);
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impl_gpio_pin!(PC3, 2, 3, EXTI3);
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impl_gpio_pin!(PC4, 2, 4, EXTI4);
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impl_gpio_pin!(PC5, 2, 5, EXTI5);
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impl_gpio_pin!(PC6, 2, 6, EXTI6);
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impl_gpio_pin!(PC7, 2, 7, EXTI7);
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impl_gpio_pin!(PC8, 2, 8, EXTI8);
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impl_gpio_pin!(PC9, 2, 9, EXTI9);
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impl_gpio_pin!(PC10, 2, 10, EXTI10);
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impl_gpio_pin!(PC11, 2, 11, EXTI11);
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impl_gpio_pin!(PC12, 2, 12, EXTI12);
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impl_gpio_pin!(PC13, 2, 13, EXTI13);
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impl_gpio_pin!(PC14, 2, 14, EXTI14);
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impl_gpio_pin!(PC15, 2, 15, EXTI15);
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pub const RCC: rcc::Rcc = rcc::Rcc(0x40021000 as _);
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pub const SYSCFG: syscfg::Syscfg = syscfg::Syscfg(0x40010000 as _);
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pub const USART2: usart::Usart = usart::Usart(0x40004400 as _);
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impl_usart!(USART2);
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impl_usart_pin!(USART2, CtsPin, PA0, 4);
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impl_usart_pin!(USART2, RtsPin, PA1, 4);
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impl_usart_pin!(USART2, RxPin, PA10, 4);
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impl_usart_pin!(USART2, CtsPin, PA11, 4);
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impl_usart_pin!(USART2, RtsPin, PA12, 4);
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impl_usart_pin!(USART2, TxPin, PA14, 4);
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impl_usart_pin!(USART2, RxPin, PA15, 4);
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impl_usart_pin!(USART2, TxPin, PA2, 4);
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impl_usart_pin!(USART2, RxPin, PA3, 4);
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impl_usart_pin!(USART2, CkPin, PA4, 4);
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impl_usart_pin!(USART2, CtsPin, PA7, 4);
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impl_usart_pin!(USART2, CkPin, PA8, 4);
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impl_usart_pin!(USART2, TxPin, PA9, 4);
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impl_usart_pin!(USART2, RtsPin, PB0, 4);
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pub use regs::dma_v1 as dma;
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pub use regs::exti_v1 as exti;
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pub use regs::gpio_v2 as gpio;
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pub use regs::rcc_l0 as rcc;
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pub use regs::syscfg_l0 as syscfg;
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pub use regs::usart_v2 as usart;
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mod regs;
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use embassy_extras::peripherals;
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pub use regs::generic;
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peripherals!(
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EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5, EXTI6, EXTI7, EXTI8, EXTI9, EXTI10, EXTI11, EXTI12,
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EXTI13, EXTI14, EXTI15, DMA1_CH0, DMA1_CH1, DMA1_CH2, DMA1_CH3, DMA1_CH4, DMA1_CH5, DMA1_CH6,
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DMA1_CH7, EXTI, PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14,
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PA15, PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15,
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PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, RCC,
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SYSCFG, USART2
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);
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pub fn DMA(n: u8) -> dma::Dma {
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match n {
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_ => DMA1,
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}
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}
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use embassy::interrupt::Interrupt;
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use embassy::interrupt::InterruptExt;
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impl_exti_irq!(EXTI0_1, EXTI2_3, EXTI4_15);
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pub mod interrupt {
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pub use cortex_m::interrupt::{CriticalSection, Mutex};
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pub use embassy::interrupt::{declare, take, Interrupt};
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pub use embassy_extras::interrupt::Priority4 as Priority;
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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#[allow(non_camel_case_types)]
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pub enum InterruptEnum {
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ADC1_COMP = 12,
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AES_LPUART1 = 29,
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DMA1_Channel1 = 9,
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DMA1_Channel2_3 = 10,
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DMA1_Channel4_5 = 11,
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EXTI0_1 = 5,
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EXTI2_3 = 6,
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EXTI4_15 = 7,
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FLASH = 3,
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I2C1 = 23,
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LPTIM1 = 13,
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PVD = 1,
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RCC = 4,
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RTC = 2,
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SPI1 = 25,
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TIM2 = 15,
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TIM21 = 20,
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USART2 = 28,
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WWDG = 0,
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}
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unsafe impl cortex_m::interrupt::InterruptNumber for InterruptEnum {
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#[inline(always)]
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fn number(self) -> u16 {
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self as u16
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}
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}
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declare!(ADC1_COMP);
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declare!(AES_LPUART1);
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declare!(DMA1_Channel1);
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declare!(DMA1_Channel2_3);
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declare!(DMA1_Channel4_5);
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declare!(EXTI0_1);
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declare!(EXTI2_3);
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declare!(EXTI4_15);
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declare!(FLASH);
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declare!(I2C1);
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declare!(LPTIM1);
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declare!(PVD);
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declare!(RCC);
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declare!(RTC);
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declare!(SPI1);
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declare!(TIM2);
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declare!(TIM21);
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declare!(USART2);
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declare!(WWDG);
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}
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mod interrupt_vector {
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extern "C" {
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fn ADC1_COMP();
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fn AES_LPUART1();
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fn DMA1_Channel1();
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fn DMA1_Channel2_3();
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fn DMA1_Channel4_5();
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fn EXTI0_1();
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fn EXTI2_3();
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fn EXTI4_15();
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fn FLASH();
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fn I2C1();
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fn LPTIM1();
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fn PVD();
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fn RCC();
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fn RTC();
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fn SPI1();
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fn TIM2();
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fn TIM21();
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fn USART2();
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fn WWDG();
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}
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pub union Vector {
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_handler: unsafe extern "C" fn(),
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_reserved: u32,
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}
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#[link_section = ".vector_table.interrupts"]
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#[no_mangle]
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pub static __INTERRUPTS: [Vector; 30] = [
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Vector { _handler: WWDG },
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Vector { _handler: PVD },
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Vector { _handler: RTC },
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Vector { _handler: FLASH },
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Vector { _handler: RCC },
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Vector { _handler: EXTI0_1 },
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Vector { _handler: EXTI2_3 },
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Vector { _handler: EXTI4_15 },
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Vector { _reserved: 0 },
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Vector {
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_handler: DMA1_Channel1,
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},
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Vector {
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_handler: DMA1_Channel2_3,
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},
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Vector {
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_handler: DMA1_Channel4_5,
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},
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Vector {
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_handler: ADC1_COMP,
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},
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Vector { _handler: LPTIM1 },
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Vector { _reserved: 0 },
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Vector { _handler: TIM2 },
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Vector { _reserved: 0 },
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Vector { _reserved: 0 },
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Vector { _reserved: 0 },
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Vector { _reserved: 0 },
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Vector { _handler: TIM21 },
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Vector { _reserved: 0 },
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Vector { _reserved: 0 },
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Vector { _handler: I2C1 },
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Vector { _reserved: 0 },
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Vector { _handler: SPI1 },
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Vector { _reserved: 0 },
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Vector { _reserved: 0 },
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Vector { _handler: USART2 },
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Vector {
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_handler: AES_LPUART1,
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},
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];
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}
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