81 lines
1.8 KiB
Rust
81 lines
1.8 KiB
Rust
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//! Interrupt management
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//!
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//! This module implements an API for managing interrupts compatible with
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//! nrf_softdevice::interrupt. Intended for switching between the two at compile-time.
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use core::sync::atomic::{compiler_fence, Ordering};
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use crate::pac::NVIC_PRIO_BITS;
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// Re-exports
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pub use embassy::interrupt::{declare, take, Interrupt};
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#[derive(Debug, Copy, Clone, Eq, PartialEq, Ord, PartialOrd)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[repr(u8)]
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pub enum Priority {
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Level0 = 0,
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Level1 = 1,
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Level2 = 2,
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Level3 = 3,
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Level4 = 4,
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Level5 = 5,
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Level6 = 6,
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Level7 = 7,
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}
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impl From<u8> for Priority {
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fn from(priority: u8) -> Self {
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match priority >> (8 - NVIC_PRIO_BITS) {
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0 => Self::Level0,
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1 => Self::Level1,
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2 => Self::Level2,
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3 => Self::Level3,
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4 => Self::Level4,
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5 => Self::Level5,
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6 => Self::Level6,
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7 => Self::Level7,
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_ => unreachable!(),
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}
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}
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}
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impl From<Priority> for u8 {
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fn from(p: Priority) -> Self {
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(p as u8) << (8 - NVIC_PRIO_BITS)
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}
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}
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mod irqs {
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use super::*;
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declare!(TIMER_IRQ_0);
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declare!(TIMER_IRQ_1);
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declare!(TIMER_IRQ_2);
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declare!(TIMER_IRQ_3);
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declare!(PWM_IRQ_WRAP);
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declare!(USBCTRL_IRQ);
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declare!(XIP_IRQ);
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declare!(PIO0_IRQ_0);
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declare!(PIO0_IRQ_1);
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declare!(PIO1_IRQ_0);
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declare!(PIO1_IRQ_1);
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declare!(DMA_IRQ_0);
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declare!(DMA_IRQ_1);
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declare!(IO_IRQ_BANK0);
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declare!(IO_IRQ_QSPI);
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declare!(SIO_IRQ_PROC0);
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declare!(SIO_IRQ_PROC1);
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declare!(CLOCKS_IRQ);
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declare!(SPI0_IRQ);
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declare!(SPI1_IRQ);
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declare!(UART0_IRQ);
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declare!(UART1_IRQ);
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declare!(ADC_IRQ_FIFO);
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declare!(I2C0_IRQ);
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declare!(I2C1_IRQ);
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declare!(RTC_IRQ);
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}
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pub use irqs::*;
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