87 lines
2.4 KiB
Rust
87 lines
2.4 KiB
Rust
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#[allow(dead_code)]
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#[derive(Clone, Copy)]
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pub enum Register {
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MACON1 = 0x00,
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MACON3 = 0x02,
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MACON4 = 0x03,
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MABBIPG = 0x04,
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MAIPGL = 0x06,
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MAIPGH = 0x07,
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MACLCON1 = 0x08,
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MACLCON2 = 0x09,
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MAMXFLL = 0x0a,
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MAMXFLH = 0x0b,
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MICMD = 0x12,
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MIREGADR = 0x14,
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MIWRL = 0x16,
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MIWRH = 0x17,
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MIRDL = 0x18,
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MIRDH = 0x19,
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}
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impl Register {
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pub(crate) fn addr(&self) -> u8 {
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*self as u8
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}
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pub(crate) fn is_eth_register(&self) -> bool {
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match *self {
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Register::MACON1 => false,
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Register::MACON3 => false,
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Register::MACON4 => false,
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Register::MABBIPG => false,
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Register::MAIPGL => false,
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Register::MAIPGH => false,
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Register::MACLCON1 => false,
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Register::MACLCON2 => false,
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Register::MAMXFLL => false,
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Register::MAMXFLH => false,
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Register::MICMD => false,
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Register::MIREGADR => false,
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Register::MIWRL => false,
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Register::MIWRH => false,
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Register::MIRDL => false,
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Register::MIRDH => false,
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}
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}
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}
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impl Into<super::Register> for Register {
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fn into(self) -> super::Register {
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super::Register::Bank2(self)
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}
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}
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register!(MACON1, 0, u8, {
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#[doc = "Enable packets to be received by the MAC"]
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marxen @ 0,
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#[doc = "Control frames will be discarded after being processed by the MAC"]
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passall @ 1,
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#[doc = "Inhibit transmissions when pause control frames are received"]
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rxpaus @ 2,
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#[doc = "Allow the MAC to transmit pause control frames"]
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txpaus @ 3,
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});
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register!(MACON3, 0, u8, {
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#[doc = "MAC will operate in Full-Duplex mode"]
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fuldpx @ 0,
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#[doc = "The type/length field of transmitted and received frames will be checked"]
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frmlnen @ 1,
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#[doc = "Frames bigger than MAMXFL will be aborted when transmitted or received"]
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hfrmen @ 2,
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#[doc = "No proprietary header is present"]
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phdren @ 3,
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#[doc = "MAC will append a valid CRC to all frames transmitted regardless of PADCFG bit"]
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txcrcen @ 4,
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#[doc = "All short frames will be zero-padded to 64 bytes and a valid CRC will then be appended"]
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padcfg @ 5..7,
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});
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register!(MICMD, 0, u8, {
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#[doc = "MII Read Enable bit"]
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miird @ 0,
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#[doc = "MII Scan Enable bit"]
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miiscan @ 1,
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});
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