2022-02-09 01:02:23 +01:00
|
|
|
use core::marker::PhantomData;
|
2022-06-12 22:15:44 +02:00
|
|
|
|
2022-07-23 14:00:19 +02:00
|
|
|
use embassy_hal_common::into_ref;
|
2022-02-10 21:38:03 +01:00
|
|
|
|
|
|
|
use crate::gpio::sealed::AFType;
|
2022-06-12 22:15:44 +02:00
|
|
|
use crate::rcc::RccPeripheral;
|
2022-07-23 14:00:19 +02:00
|
|
|
use crate::{peripherals, Peripheral};
|
2022-02-10 21:38:03 +01:00
|
|
|
|
|
|
|
macro_rules! config_ulpi_pins {
|
2022-02-09 01:02:23 +01:00
|
|
|
($($pin:ident),*) => {
|
2022-07-23 14:00:19 +02:00
|
|
|
into_ref!($($pin),*);
|
2022-02-10 21:38:03 +01:00
|
|
|
// NOTE(unsafe) Exclusive access to the registers
|
|
|
|
critical_section::with(|_| unsafe {
|
|
|
|
$(
|
|
|
|
$pin.set_as_af($pin.af_num(), AFType::OutputPushPull);
|
2022-05-08 21:37:37 +02:00
|
|
|
#[cfg(gpio_v2)]
|
|
|
|
$pin.set_speed(crate::gpio::Speed::VeryHigh);
|
2022-02-10 21:38:03 +01:00
|
|
|
)*
|
|
|
|
})
|
2022-02-09 01:02:23 +01:00
|
|
|
};
|
|
|
|
}
|
|
|
|
|
2022-05-04 01:00:38 +02:00
|
|
|
/// USB PHY type
|
|
|
|
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
|
|
|
|
pub enum PhyType {
|
|
|
|
/// Internal Full-Speed PHY
|
|
|
|
///
|
|
|
|
/// Available on most High-Speed peripherals.
|
|
|
|
InternalFullSpeed,
|
|
|
|
/// Internal High-Speed PHY
|
|
|
|
///
|
|
|
|
/// Available on a few STM32 chips.
|
|
|
|
InternalHighSpeed,
|
|
|
|
/// External ULPI High-Speed PHY
|
|
|
|
ExternalHighSpeed,
|
|
|
|
}
|
|
|
|
|
2022-02-09 01:02:23 +01:00
|
|
|
pub struct UsbOtg<'d, T: Instance> {
|
|
|
|
phantom: PhantomData<&'d mut T>,
|
2022-05-04 01:00:38 +02:00
|
|
|
_phy_type: PhyType,
|
2022-02-09 01:02:23 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
impl<'d, T: Instance> UsbOtg<'d, T> {
|
2022-02-09 01:10:54 +01:00
|
|
|
/// Initializes USB OTG peripheral with internal Full-Speed PHY
|
2022-02-09 01:02:23 +01:00
|
|
|
pub fn new_fs(
|
2022-07-23 14:00:19 +02:00
|
|
|
_peri: impl Peripheral<P = T> + 'd,
|
|
|
|
dp: impl Peripheral<P = impl DpPin<T>> + 'd,
|
|
|
|
dm: impl Peripheral<P = impl DmPin<T>> + 'd,
|
2022-02-09 01:02:23 +01:00
|
|
|
) -> Self {
|
2022-07-23 14:00:19 +02:00
|
|
|
into_ref!(dp, dm);
|
2022-02-10 21:38:03 +01:00
|
|
|
|
|
|
|
unsafe {
|
|
|
|
dp.set_as_af(dp.af_num(), AFType::OutputPushPull);
|
|
|
|
dm.set_as_af(dm.af_num(), AFType::OutputPushPull);
|
|
|
|
}
|
2022-02-09 01:02:23 +01:00
|
|
|
|
|
|
|
Self {
|
|
|
|
phantom: PhantomData,
|
2022-05-04 01:00:38 +02:00
|
|
|
_phy_type: PhyType::InternalFullSpeed,
|
2022-02-09 01:02:23 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-02-09 01:10:54 +01:00
|
|
|
/// Initializes USB OTG peripheral with external High-Speed PHY
|
2022-02-09 01:02:23 +01:00
|
|
|
pub fn new_hs_ulpi(
|
2022-07-23 14:00:19 +02:00
|
|
|
_peri: impl Peripheral<P = T> + 'd,
|
|
|
|
ulpi_clk: impl Peripheral<P = impl UlpiClkPin<T>> + 'd,
|
|
|
|
ulpi_dir: impl Peripheral<P = impl UlpiDirPin<T>> + 'd,
|
|
|
|
ulpi_nxt: impl Peripheral<P = impl UlpiNxtPin<T>> + 'd,
|
|
|
|
ulpi_stp: impl Peripheral<P = impl UlpiStpPin<T>> + 'd,
|
|
|
|
ulpi_d0: impl Peripheral<P = impl UlpiD0Pin<T>> + 'd,
|
|
|
|
ulpi_d1: impl Peripheral<P = impl UlpiD1Pin<T>> + 'd,
|
|
|
|
ulpi_d2: impl Peripheral<P = impl UlpiD2Pin<T>> + 'd,
|
|
|
|
ulpi_d3: impl Peripheral<P = impl UlpiD3Pin<T>> + 'd,
|
|
|
|
ulpi_d4: impl Peripheral<P = impl UlpiD4Pin<T>> + 'd,
|
|
|
|
ulpi_d5: impl Peripheral<P = impl UlpiD5Pin<T>> + 'd,
|
|
|
|
ulpi_d6: impl Peripheral<P = impl UlpiD6Pin<T>> + 'd,
|
|
|
|
ulpi_d7: impl Peripheral<P = impl UlpiD7Pin<T>> + 'd,
|
2022-02-09 01:02:23 +01:00
|
|
|
) -> Self {
|
2022-02-10 21:38:03 +01:00
|
|
|
config_ulpi_pins!(
|
2022-06-12 22:15:44 +02:00
|
|
|
ulpi_clk, ulpi_dir, ulpi_nxt, ulpi_stp, ulpi_d0, ulpi_d1, ulpi_d2, ulpi_d3, ulpi_d4, ulpi_d5, ulpi_d6,
|
|
|
|
ulpi_d7
|
2022-02-10 21:38:03 +01:00
|
|
|
);
|
2022-02-09 01:02:23 +01:00
|
|
|
|
|
|
|
Self {
|
|
|
|
phantom: PhantomData,
|
2022-05-04 01:00:38 +02:00
|
|
|
_phy_type: PhyType::ExternalHighSpeed,
|
2022-02-09 01:02:23 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl<'d, T: Instance> Drop for UsbOtg<'d, T> {
|
|
|
|
fn drop(&mut self) {
|
|
|
|
T::reset();
|
|
|
|
T::disable();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pub(crate) mod sealed {
|
|
|
|
pub trait Instance {
|
|
|
|
const REGISTERS: *const ();
|
|
|
|
const HIGH_SPEED: bool;
|
|
|
|
const FIFO_DEPTH_WORDS: usize;
|
|
|
|
const ENDPOINT_COUNT: usize;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pub trait Instance: sealed::Instance + RccPeripheral {}
|
|
|
|
|
2022-02-10 21:38:03 +01:00
|
|
|
// Internal PHY pins
|
|
|
|
pin_trait!(DpPin, Instance);
|
|
|
|
pin_trait!(DmPin, Instance);
|
|
|
|
|
|
|
|
// External PHY pins
|
|
|
|
pin_trait!(UlpiClkPin, Instance);
|
|
|
|
pin_trait!(UlpiDirPin, Instance);
|
|
|
|
pin_trait!(UlpiNxtPin, Instance);
|
|
|
|
pin_trait!(UlpiStpPin, Instance);
|
|
|
|
pin_trait!(UlpiD0Pin, Instance);
|
|
|
|
pin_trait!(UlpiD1Pin, Instance);
|
|
|
|
pin_trait!(UlpiD2Pin, Instance);
|
|
|
|
pin_trait!(UlpiD3Pin, Instance);
|
|
|
|
pin_trait!(UlpiD4Pin, Instance);
|
|
|
|
pin_trait!(UlpiD5Pin, Instance);
|
|
|
|
pin_trait!(UlpiD6Pin, Instance);
|
|
|
|
pin_trait!(UlpiD7Pin, Instance);
|
2022-02-09 01:02:23 +01:00
|
|
|
|
2022-02-26 01:40:43 +01:00
|
|
|
foreach_peripheral!(
|
2022-02-09 01:02:23 +01:00
|
|
|
(otgfs, $inst:ident) => {
|
|
|
|
impl sealed::Instance for peripherals::$inst {
|
|
|
|
const REGISTERS: *const () = crate::pac::$inst.0 as *const ();
|
|
|
|
const HIGH_SPEED: bool = false;
|
|
|
|
|
|
|
|
cfg_if::cfg_if! {
|
|
|
|
if #[cfg(stm32f1)] {
|
|
|
|
const FIFO_DEPTH_WORDS: usize = 128;
|
|
|
|
const ENDPOINT_COUNT: usize = 8;
|
|
|
|
} else if #[cfg(any(
|
|
|
|
stm32f2,
|
|
|
|
stm32f401,
|
|
|
|
stm32f405,
|
|
|
|
stm32f407,
|
|
|
|
stm32f411,
|
|
|
|
stm32f415,
|
|
|
|
stm32f417,
|
|
|
|
stm32f427,
|
|
|
|
stm32f429,
|
|
|
|
stm32f437,
|
|
|
|
stm32f439,
|
|
|
|
))] {
|
|
|
|
const FIFO_DEPTH_WORDS: usize = 320;
|
|
|
|
const ENDPOINT_COUNT: usize = 4;
|
|
|
|
} else if #[cfg(any(
|
|
|
|
stm32f412,
|
|
|
|
stm32f413,
|
|
|
|
stm32f423,
|
|
|
|
stm32f446,
|
|
|
|
stm32f469,
|
|
|
|
stm32f479,
|
|
|
|
stm32f7,
|
|
|
|
stm32l4,
|
|
|
|
stm32u5,
|
|
|
|
))] {
|
|
|
|
const FIFO_DEPTH_WORDS: usize = 320;
|
|
|
|
const ENDPOINT_COUNT: usize = 6;
|
|
|
|
} else if #[cfg(stm32g0x1)] {
|
|
|
|
const FIFO_DEPTH_WORDS: usize = 512;
|
|
|
|
const ENDPOINT_COUNT: usize = 8;
|
|
|
|
} else {
|
2022-05-04 01:00:38 +02:00
|
|
|
compile_error!("USB_OTG_FS peripheral is not supported by this chip.");
|
2022-02-09 01:02:23 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Instance for peripherals::$inst {}
|
|
|
|
};
|
|
|
|
|
|
|
|
(otghs, $inst:ident) => {
|
|
|
|
impl sealed::Instance for peripherals::$inst {
|
|
|
|
const REGISTERS: *const () = crate::pac::$inst.0 as *const ();
|
|
|
|
const HIGH_SPEED: bool = true;
|
|
|
|
|
|
|
|
cfg_if::cfg_if! {
|
|
|
|
if #[cfg(any(
|
|
|
|
stm32f2,
|
|
|
|
stm32f405,
|
|
|
|
stm32f407,
|
|
|
|
stm32f415,
|
|
|
|
stm32f417,
|
|
|
|
stm32f427,
|
|
|
|
stm32f429,
|
|
|
|
stm32f437,
|
|
|
|
stm32f439,
|
|
|
|
))] {
|
|
|
|
const FIFO_DEPTH_WORDS: usize = 1024;
|
|
|
|
const ENDPOINT_COUNT: usize = 6;
|
|
|
|
} else if #[cfg(any(
|
|
|
|
stm32f446,
|
|
|
|
stm32f469,
|
|
|
|
stm32f479,
|
|
|
|
stm32f7,
|
|
|
|
stm32h7,
|
|
|
|
))] {
|
|
|
|
const FIFO_DEPTH_WORDS: usize = 1024;
|
|
|
|
const ENDPOINT_COUNT: usize = 9;
|
|
|
|
} else {
|
2022-05-04 01:00:38 +02:00
|
|
|
compile_error!("USB_OTG_HS peripheral is not supported by this chip.");
|
2022-02-09 01:02:23 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Instance for peripherals::$inst {}
|
|
|
|
};
|
|
|
|
);
|