From 00258bca4320bcf33f6285126a1f31fd6a9ed83c Mon Sep 17 00:00:00 2001 From: Roy Buitenhuis Date: Tue, 11 Apr 2023 16:53:04 +0200 Subject: [PATCH] Add empty test binary for riscv --- ci.sh | 2 ++ tests/riscv32/.cargo/config.toml | 9 +++++++ tests/riscv32/Cargo.toml | 46 ++++++++++++++++++++++++++++++++ tests/riscv32/memory.x | 14 ++++++++++ tests/riscv32/src/bin/empty.rs | 16 +++++++++++ 5 files changed, 87 insertions(+) create mode 100644 tests/riscv32/.cargo/config.toml create mode 100644 tests/riscv32/Cargo.toml create mode 100644 tests/riscv32/memory.x create mode 100644 tests/riscv32/src/bin/empty.rs diff --git a/ci.sh b/ci.sh index f81b34c0..30fca4bc 100755 --- a/ci.sh +++ b/ci.sh @@ -124,6 +124,8 @@ cargo batch \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585ai --out-dir out/tests/iot-stm32u585ai \ --- build --release --manifest-path tests/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/rpi-pico \ --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv7em-none-eabi --out-dir out/tests/nrf52840-dk \ + --- build --release --manifest-path tests/riscv32/Cargo.toml --target riscv32imac-unknown-none-elf \ + $BUILD_EXTRA diff --git a/tests/riscv32/.cargo/config.toml b/tests/riscv32/.cargo/config.toml new file mode 100644 index 00000000..1ffb0305 --- /dev/null +++ b/tests/riscv32/.cargo/config.toml @@ -0,0 +1,9 @@ +[target.riscv32imac-unknown-none-elf] +runner = "true" +rustflags = [ + "-C", "link-arg=-Tmemory.x", + "-C", "link-arg=-Tlink.x", +] + +[build] +target = "riscv32imac-unknown-none-elf" diff --git a/tests/riscv32/Cargo.toml b/tests/riscv32/Cargo.toml new file mode 100644 index 00000000..885776ae --- /dev/null +++ b/tests/riscv32/Cargo.toml @@ -0,0 +1,46 @@ +[package] +edition = "2021" +name = "embassy-riscv-tests" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +critical-section = { version = "1.1.1", features = ["restore-state-bool"] } +embassy-sync = { version = "0.1.0", path = "../../embassy-sync" } +embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["arch-riscv32", "nightly", "executor-thread"] } +embassy-time = { version = "0.1.0", path = "../../embassy-time" } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } + +riscv-rt = "0.11" +riscv = { version = "0.10", features = ["critical-section-single-hart"] } + + +[profile.dev] +debug = 2 +debug-assertions = true +opt-level = 's' +overflow-checks = true + +[profile.release] +codegen-units = 1 +debug = 2 +debug-assertions = false +incremental = false +lto = "fat" +opt-level = 's' +overflow-checks = false + +# do not optimize proc-macro crates = faster builds from scratch +[profile.dev.build-override] +codegen-units = 8 +debug = false +debug-assertions = false +opt-level = 0 +overflow-checks = false + +[profile.release.build-override] +codegen-units = 8 +debug = false +debug-assertions = false +opt-level = 0 +overflow-checks = false diff --git a/tests/riscv32/memory.x b/tests/riscv32/memory.x new file mode 100644 index 00000000..316d577d --- /dev/null +++ b/tests/riscv32/memory.x @@ -0,0 +1,14 @@ +MEMORY +{ + ROM : ORIGIN = 0x80000000, LENGTH = 0x00020000 + RAM : ORIGIN = 0x84000000, LENGTH = 0x00008000 +} + +REGION_ALIAS("REGION_TEXT", ROM); +REGION_ALIAS("REGION_RODATA", ROM); +REGION_ALIAS("REGION_DATA", RAM); +REGION_ALIAS("REGION_BSS", RAM); +REGION_ALIAS("REGION_HEAP", RAM); +REGION_ALIAS("REGION_STACK", RAM); + +_stack_start = ORIGIN(RAM) + LENGTH(RAM) - 4; diff --git a/tests/riscv32/src/bin/empty.rs b/tests/riscv32/src/bin/empty.rs new file mode 100644 index 00000000..d5a55c84 --- /dev/null +++ b/tests/riscv32/src/bin/empty.rs @@ -0,0 +1,16 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] + +use embassy_executor::Spawner; + +#[panic_handler] +fn panic (_info: &core::panic::PanicInfo) -> ! { + loop {} +} + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + // Don't do anything, just make sure it compiles. + loop {} +}