stm32: add stm32u5 GPDMA, SPIv4 support, add HIL tests.

tests/stm32/Cargo.toml

@@ -6,12 +6,13 @@ version = "0.1.0"
 resolver = "2"
 
 [features]
-stm32f103c8 = ["embassy-stm32/stm32f103c8"]
-stm32f429zi = ["embassy-stm32/stm32f429zi"]
-stm32g071rb = ["embassy-stm32/stm32g071rb"]
-stm32g491re = ["embassy-stm32/stm32g491re"]
-stm32h755zi = ["embassy-stm32/stm32h755zi-cm7"]
-stm32wb55rg = ["embassy-stm32/stm32wb55rg"]
+stm32f103c8 = ["embassy-stm32/stm32f103c8"]     # Blue Pill
+stm32f429zi = ["embassy-stm32/stm32f429zi"]     # Nucleo
+stm32g071rb = ["embassy-stm32/stm32g071rb"]     # Nucleo
+stm32g491re = ["embassy-stm32/stm32g491re"]     # Nucleo
+stm32h755zi = ["embassy-stm32/stm32h755zi-cm7"] # Nucleo
+stm32wb55rg = ["embassy-stm32/stm32wb55rg"]     # Nucleo
+stm32u585ai = ["embassy-stm32/stm32u585ai"]     # IoT board
 
 [dependencies]
 embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt"] }

tests/stm32/src/bin/gpio.rs

@@ -28,6 +28,8 @@ async fn main(_spawner: Spawner, p: Peripherals) {
     let (mut a, mut b) = (p.PA3, p.PA2);
     #[cfg(feature = "stm32h755zi")]
     let (mut a, mut b) = (p.PB6, p.PB7);
+    #[cfg(feature = "stm32u585ai")]
+    let (mut a, mut b) = (p.PD9, p.PD8);
 
     // Test initial output
     {

tests/stm32/src/bin/spi.rs

@@ -16,10 +16,20 @@ use example_common::*;
 async fn main(_spawner: Spawner, p: Peripherals) {
     info!("Hello World!");
 
-    #[cfg(not(feature = "stm32h755zi"))]
+    #[cfg(feature = "stm32f103c8")]
+    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    #[cfg(feature = "stm32f429zi")]
     let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
     #[cfg(feature = "stm32h755zi")]
     let (sck, mosi, miso) = (p.PA5, p.PB5, p.PA6);
+    #[cfg(feature = "stm32g491re")]
+    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    #[cfg(feature = "stm32g071rb")]
+    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    #[cfg(feature = "stm32wb55rg")]
+    let (sck, mosi, miso) = (p.PA5, p.PA7, p.PA6);
+    #[cfg(feature = "stm32u585ai")]
+    let (sck, mosi, miso) = (p.PE13, p.PE15, p.PE14);
 
     let mut spi = Spi::new(
         p.SPI1,

tests/stm32/src/bin/spi_dma.rs

@@ -27,6 +27,8 @@ async fn main(_spawner: Spawner, p: Peripherals) {
     let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
     #[cfg(feature = "stm32wb55rg")]
     let (sck, mosi, miso, tx_dma, rx_dma) = (p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    #[cfg(feature = "stm32u585ai")]
+    let (sck, mosi, miso, tx_dma, rx_dma) = (p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
 
     let mut spi = Spi::new(
         p.SPI1,

tests/stm32/src/bin/usart.rs

@@ -35,6 +35,8 @@ async fn main(_spawner: Spawner, p: Peripherals) {
     let (tx, rx, usart) = (p.PA9, p.PA10, p.USART1); // TODO this is wrong
     #[cfg(feature = "stm32h755zi")]
     let (tx, rx, usart) = (p.PB6, p.PB7, p.USART1);
+    #[cfg(feature = "stm32u585ai")]
+    let (tx, rx, usart) = (p.PD8, p.PD9, p.USART3);
 
     let config = Config::default();
     let mut usart = Uart::new(usart, rx, tx, NoDma, NoDma, config);

tests/stm32/src/bin/usart_dma.rs

@@ -34,6 +34,8 @@ async fn main(_spawner: Spawner, p: Peripherals) {
     let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH1, p.DMA1_CH2); // TODO this is wrong
     #[cfg(feature = "stm32h755zi")]
     let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
+    #[cfg(feature = "stm32u585ai")]
+    let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
 
     let config = Config::default();
     let mut usart = Uart::new(usart, rx, tx, tx_dma, rx_dma, config);