nrf/ppi: feature-gate dppi stuff.
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@ -35,6 +35,7 @@ pub struct Ppi<'d, C: Channel, const EVENT_COUNT: usize, const TASK_COUNT: usize
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tasks: [Task; TASK_COUNT],
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tasks: [Task; TASK_COUNT],
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}
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}
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#[cfg(feature = "_dppi")]
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const REGISTER_DPPI_CONFIG_OFFSET: usize = 0x80 / core::mem::size_of::<u32>();
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const REGISTER_DPPI_CONFIG_OFFSET: usize = 0x80 / core::mem::size_of::<u32>();
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/// Represents a task that a peripheral can do.
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/// Represents a task that a peripheral can do.
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@ -49,7 +50,8 @@ impl Task {
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Self(unsafe { NonNull::new_unchecked(reg as *const _ as *mut _) })
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Self(unsafe { NonNull::new_unchecked(reg as *const _ as *mut _) })
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}
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}
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/// Address off subscription register for this task.
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/// Address of subscription register for this task.
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#[cfg(feature = "_dppi")]
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pub fn subscribe_reg(&self) -> *mut u32 {
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pub fn subscribe_reg(&self) -> *mut u32 {
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unsafe { self.0.as_ptr().add(REGISTER_DPPI_CONFIG_OFFSET) }
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unsafe { self.0.as_ptr().add(REGISTER_DPPI_CONFIG_OFFSET) }
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}
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}
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@ -72,6 +74,7 @@ impl Event {
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}
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}
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/// Address of publish register for this event.
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/// Address of publish register for this event.
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#[cfg(feature = "_dppi")]
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pub fn publish_reg(&self) -> *mut u32 {
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pub fn publish_reg(&self) -> *mut u32 {
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unsafe { self.0.as_ptr().add(REGISTER_DPPI_CONFIG_OFFSET) }
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unsafe { self.0.as_ptr().add(REGISTER_DPPI_CONFIG_OFFSET) }
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}
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}
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