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stm32/rcc: add shared code for hsi48 with crs support.

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This commit is contained in:
Dario Nieuwenhuis
2023-11-05 23:35:01 +01:00
parent c4a8b79dbc
commit 0272deb158
25 changed files with 136 additions and 161 deletions
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2
examples/stm32h5/src/bin/eth.rs
View File

@ -37,7 +37,7 @@ async fn net_task(stack: &'static Stack<Device>) -> ! {
async fn main(spawner: Spawner) -> ! {
let mut config = Config::default();
config.rcc.hsi = None;
config.rcc.hsi48 = true; // needed for rng
config.rcc.hsi48 = Some(Default::default()); // needed for RNG
config.rcc.hse = Some(Hse {
freq: Hertz(8_000_000),
mode: HseMode::BypassDigital,

46
examples/stm32h5/src/bin/usb_serial.rs
View File

@ -4,9 +4,6 @@
use defmt::{panic, *};
use embassy_executor::Spawner;
use embassy_stm32::rcc::{
AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllDiv, PllMul, PllPreDiv, PllSource, Sysclk, VoltageScale,
};
use embassy_stm32::time::Hertz;
use embassy_stm32::usb::{Driver, Instance};
use embassy_stm32::{bind_interrupts, pac, peripherals, usb, Config};
@ -23,26 +20,29 @@ bind_interrupts!(struct Irqs {
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.rcc.hsi = None;
config.rcc.hsi48 = true; // needed for usb
config.rcc.hse = Some(Hse {
freq: Hertz(8_000_000),
mode: HseMode::BypassDigital,
});
config.rcc.pll1 = Some(Pll {
source: PllSource::HSE,
prediv: PllPreDiv::DIV2,
mul: PllMul::MUL125,
divp: Some(PllDiv::DIV2), // 250mhz
divq: None,
divr: None,
});
config.rcc.ahb_pre = AHBPrescaler::DIV2;
config.rcc.apb1_pre = APBPrescaler::DIV4;
config.rcc.apb2_pre = APBPrescaler::DIV2;
config.rcc.apb3_pre = APBPrescaler::DIV4;
config.rcc.sys = Sysclk::PLL1_P;
config.rcc.voltage_scale = VoltageScale::Scale0;
{
use embassy_stm32::rcc::*;
config.rcc.hsi = None;
config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB
config.rcc.hse = Some(Hse {
freq: Hertz(8_000_000),
mode: HseMode::BypassDigital,
});
config.rcc.pll1 = Some(Pll {
source: PllSource::HSE,
prediv: PllPreDiv::DIV2,
mul: PllMul::MUL125,
divp: Some(PllDiv::DIV2), // 250mhz
divq: None,
divr: None,
});
config.rcc.ahb_pre = AHBPrescaler::DIV2;
config.rcc.apb1_pre = APBPrescaler::DIV4;
config.rcc.apb2_pre = APBPrescaler::DIV2;
config.rcc.apb3_pre = APBPrescaler::DIV4;
config.rcc.sys = Sysclk::PLL1_P;
config.rcc.voltage_scale = VoltageScale::Scale0;
}
let p = embassy_stm32::init(config);
info!("Hello World!");