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Add external LoRa physical layer functionality.

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This commit is contained in:
ceekdee
2023-04-21 01:20:46 -05:00
parent fb27594b2e
commit 02c86bca52
15 changed files with 884 additions and 103 deletions
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2
embassy-stm32/src/spi/mod.rs
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@ -197,7 +197,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
/// Useful for on chip peripherals like SUBGHZ which are hardwired.
/// The bus can optionally be exposed externally with `Spi::new()` still.
#[allow(dead_code)]
pub(crate) fn new_internal(
pub fn new_subghz(
peri: impl Peripheral<P = T> + 'd,
txdma: impl Peripheral<P = Tx> + 'd,
rxdma: impl Peripheral<P = Rx> + 'd,

2
embassy-stm32/src/subghz/mod.rs
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@ -224,7 +224,7 @@ impl<'d, Tx, Rx> SubGhz<'d, Tx, Rx> {
let mut config = SpiConfig::default();
config.mode = MODE_0;
config.bit_order = BitOrder::MsbFirst;
let spi = Spi::new_internal(peri, txdma, rxdma, clk, config);
let spi = Spi::new_subghz(peri, txdma, rxdma, clk, config);
unsafe { wakeup() };