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stm32: only enable async TimeoutI2c on V2 I2C peripheral

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This commit is contained in:
Matt Ickstadt 2023-07-31 14:17:50 -05:00
parent 26cc0e634d
commit 036bc669cd
1 changed files with 8 additions and 0 deletions
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8
embassy-stm32/src/i2c/timeout.rs
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@ -30,6 +30,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
// ========================= // =========================
// Async public API // Async public API
#[cfg(i2c_v2)]
pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
where where
TXDMA: crate::i2c::TxDma<T>, TXDMA: crate::i2c::TxDma<T>,
@ -37,6 +38,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
self.write_timeout(address, write, self.timeout).await self.write_timeout(address, write, self.timeout).await
} }
#[cfg(i2c_v2)]
pub async fn write_timeout(&mut self, address: u8, write: &[u8], timeout: Duration) -> Result<(), Error> pub async fn write_timeout(&mut self, address: u8, write: &[u8], timeout: Duration) -> Result<(), Error>
where where
TXDMA: crate::i2c::TxDma<T>, TXDMA: crate::i2c::TxDma<T>,
@ -44,6 +46,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
self.i2c.write_timeout(address, write, timeout_fn(timeout)).await self.i2c.write_timeout(address, write, timeout_fn(timeout)).await
} }
#[cfg(i2c_v2)]
pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error> pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
where where
TXDMA: crate::i2c::TxDma<T>, TXDMA: crate::i2c::TxDma<T>,
@ -51,6 +54,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
self.write_vectored_timeout(address, write, self.timeout).await self.write_vectored_timeout(address, write, self.timeout).await
} }
#[cfg(i2c_v2)]
pub async fn write_vectored_timeout(&mut self, address: u8, write: &[&[u8]], timeout: Duration) -> Result<(), Error> pub async fn write_vectored_timeout(&mut self, address: u8, write: &[&[u8]], timeout: Duration) -> Result<(), Error>
where where
TXDMA: crate::i2c::TxDma<T>, TXDMA: crate::i2c::TxDma<T>,
@ -60,6 +64,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
.await .await
} }
#[cfg(i2c_v2)]
pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
where where
RXDMA: crate::i2c::RxDma<T>, RXDMA: crate::i2c::RxDma<T>,
@ -67,6 +72,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
self.read_timeout(address, buffer, self.timeout).await self.read_timeout(address, buffer, self.timeout).await
} }
#[cfg(i2c_v2)]
pub async fn read_timeout(&mut self, address: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error> pub async fn read_timeout(&mut self, address: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error>
where where
RXDMA: crate::i2c::RxDma<T>, RXDMA: crate::i2c::RxDma<T>,
@ -74,6 +80,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
self.i2c.read_timeout(address, buffer, timeout_fn(timeout)).await self.i2c.read_timeout(address, buffer, timeout_fn(timeout)).await
} }
#[cfg(i2c_v2)]
pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
where where
TXDMA: super::TxDma<T>, TXDMA: super::TxDma<T>,
@ -82,6 +89,7 @@ impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
self.write_read_timeout(address, write, read, self.timeout).await self.write_read_timeout(address, write, read, self.timeout).await
} }
#[cfg(i2c_v2)]
pub async fn write_read_timeout( pub async fn write_read_timeout(
&mut self, &mut self,
address: u8, address: u8,