diff --git a/embassy-stm32/src/flash/f0.rs b/embassy-stm32/src/flash/f0.rs index ec8343e7..d011522b 100644 --- a/embassy-stm32/src/flash/f0.rs +++ b/embassy-stm32/src/flash/f0.rs @@ -76,17 +76,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E } pub(crate) unsafe fn clear_all_err() { - pac::FLASH.sr().modify(|w| { - if w.pgerr() { - w.set_pgerr(true); - } - if w.wrprt() { - w.set_wrprt(true) - }; - if w.eop() { - w.set_eop(true); - } - }); + // read and write back the same value. + // This clears all "write 0 to clear" bits. + pac::FLASH.sr().modify(|_| {}); } unsafe fn wait_ready_blocking() -> Result<(), Error> { diff --git a/embassy-stm32/src/flash/f3.rs b/embassy-stm32/src/flash/f3.rs index 40335d64..065369f6 100644 --- a/embassy-stm32/src/flash/f3.rs +++ b/embassy-stm32/src/flash/f3.rs @@ -76,17 +76,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E } pub(crate) unsafe fn clear_all_err() { - pac::FLASH.sr().modify(|w| { - if w.pgerr() { - w.set_pgerr(true); - } - if w.wrprterr() { - w.set_wrprterr(true); - } - if w.eop() { - w.set_eop(true); - } - }); + // read and write back the same value. + // This clears all "write 0 to clear" bits. + pac::FLASH.sr().modify(|_| {}); } unsafe fn wait_ready_blocking() -> Result<(), Error> { diff --git a/embassy-stm32/src/flash/f4.rs b/embassy-stm32/src/flash/f4.rs index 728f6d60..913950fe 100644 --- a/embassy-stm32/src/flash/f4.rs +++ b/embassy-stm32/src/flash/f4.rs @@ -336,12 +336,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E } pub(crate) fn clear_all_err() { - pac::FLASH.sr().write(|w| { - w.set_pgserr(true); - w.set_pgperr(true); - w.set_pgaerr(true); - w.set_wrperr(true); - }); + // read and write back the same value. + // This clears all "write 0 to clear" bits. + pac::FLASH.sr().modify(|_| {}); } pub(crate) async fn wait_ready() -> Result<(), Error> { diff --git a/embassy-stm32/src/flash/f7.rs b/embassy-stm32/src/flash/f7.rs index 1a6d6bb0..3a5bdf9c 100644 --- a/embassy-stm32/src/flash/f7.rs +++ b/embassy-stm32/src/flash/f7.rs @@ -66,23 +66,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E } pub(crate) unsafe fn clear_all_err() { - pac::FLASH.sr().modify(|w| { - if w.erserr() { - w.set_erserr(true); - } - if w.pgperr() { - w.set_pgperr(true); - } - if w.pgaerr() { - w.set_pgaerr(true); - } - if w.wrperr() { - w.set_wrperr(true); - } - if w.eop() { - w.set_eop(true); - } - }); + // read and write back the same value. + // This clears all "write 0 to clear" bits. + pac::FLASH.sr().modify(|_| {}); } unsafe fn blocking_wait_ready() -> Result<(), Error> { diff --git a/embassy-stm32/src/flash/g0.rs b/embassy-stm32/src/flash/g0.rs index 60ff1abf..3a457601 100644 --- a/embassy-stm32/src/flash/g0.rs +++ b/embassy-stm32/src/flash/g0.rs @@ -89,27 +89,7 @@ pub(crate) unsafe fn wait_ready_blocking() -> Result<(), Error> { } pub(crate) unsafe fn clear_all_err() { - pac::FLASH.sr().modify(|w| { - if w.progerr() { - w.set_progerr(true); - } - if w.pgserr() { - w.set_pgserr(true); - } - if w.rderr() { - w.set_rderr(true); - } - if w.optverr() { - w.set_optverr(true); - } - if w.sizerr() { - w.set_sizerr(true); - } - if w.pgaerr() { - w.set_pgaerr(true); - } - if w.wrperr() { - w.set_wrperr(true); - } - }); + // read and write back the same value. + // This clears all "write 0 to clear" bits. + pac::FLASH.sr().modify(|_| {}); } diff --git a/embassy-stm32/src/flash/h7.rs b/embassy-stm32/src/flash/h7.rs index bf17b5b1..bb429d77 100644 --- a/embassy-stm32/src/flash/h7.rs +++ b/embassy-stm32/src/flash/h7.rs @@ -104,39 +104,9 @@ pub(crate) unsafe fn clear_all_err() { } unsafe fn bank_clear_all_err(bank: pac::flash::Bank) { - bank.sr().modify(|w| { - if w.wrperr() { - w.set_wrperr(true); - } - if w.pgserr() { - w.set_pgserr(true); - } - if w.strberr() { - // single address was written multiple times, can be ignored - w.set_strberr(true); - } - if w.incerr() { - // writing to a different address when programming 256 bit word was not finished - w.set_incerr(true); - } - if w.operr() { - w.set_operr(true); - } - if w.sneccerr1() { - // single ECC error - w.set_sneccerr1(true); - } - if w.dbeccerr() { - // double ECC error - w.set_dbeccerr(true); - } - if w.rdperr() { - w.set_rdperr(true); - } - if w.rdserr() { - w.set_rdserr(true); - } - }); + // read and write back the same value. + // This clears all "write 0 to clear" bits. + bank.sr().modify(|_| {}); } unsafe fn blocking_wait_ready(bank: pac::flash::Bank) -> Result<(), Error> { diff --git a/embassy-stm32/src/flash/l.rs b/embassy-stm32/src/flash/l.rs index 243c8b51..24dcf99b 100644 --- a/embassy-stm32/src/flash/l.rs +++ b/embassy-stm32/src/flash/l.rs @@ -113,41 +113,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E } pub(crate) unsafe fn clear_all_err() { - pac::FLASH.sr().modify(|w| { - #[cfg(any(flash_wl, flash_wb, flash_l4, flash_l0))] - if w.rderr() { - w.set_rderr(true); - } - #[cfg(any(flash_wl, flash_wb, flash_l4))] - if w.fasterr() { - w.set_fasterr(true); - } - #[cfg(any(flash_wl, flash_wb, flash_l4))] - if w.miserr() { - w.set_miserr(true); - } - #[cfg(any(flash_wl, flash_wb, flash_l4))] - if w.pgserr() { - w.set_pgserr(true); - } - if w.sizerr() { - w.set_sizerr(true); - } - if w.pgaerr() { - w.set_pgaerr(true); - } - if w.wrperr() { - w.set_wrperr(true); - } - #[cfg(any(flash_wl, flash_wb, flash_l4))] - if w.progerr() { - w.set_progerr(true); - } - #[cfg(any(flash_wl, flash_wb, flash_l4))] - if w.operr() { - w.set_operr(true); - } - }); + // read and write back the same value. + // This clears all "write 0 to clear" bits. + pac::FLASH.sr().modify(|_| {}); } unsafe fn wait_ready_blocking() -> Result<(), Error> {