diff --git a/cyw43/src/bus.rs b/cyw43/src/bus.rs index ed031861..32aed697 100644 --- a/cyw43/src/bus.rs +++ b/cyw43/src/bus.rs @@ -252,14 +252,14 @@ where if len == 4 { bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG; } - + let val = self.readn(FUNC_BACKPLANE, bus_addr, len).await; debug!("backplane_readn addr = {:08x} len = {} val = {:08x}", addr, len, val); self.backplane_set_window(0x18000000).await; // CHIPCOMMON_BASE_ADDRESS - return val; + return val } async fn backplane_writen(&mut self, addr: u32, val: u32, len: u32) { @@ -307,7 +307,7 @@ where ) .await; } - + self.backplane_window = new_window; } @@ -345,10 +345,7 @@ where self.status = self.spi.cmd_read(cmd, &mut buf[..len]).await; - debug!( - "readn cmd = {:08x} addr = {:08x} len = {} buf = {:08x}", - cmd, addr, len, buf - ); + debug!("readn cmd = {:08x} addr = {:08x} len = {} buf = {:08x}", cmd, addr, len, buf); // if we read from the backplane, the result is in the second word, after the response delay if func == FUNC_BACKPLANE { diff --git a/cyw43/src/consts.rs b/cyw43/src/consts.rs index e845f19d..e0357a5c 100644 --- a/cyw43/src/consts.rs +++ b/cyw43/src/consts.rs @@ -65,8 +65,8 @@ pub(crate) const REG_BACKPLANE_READ_FRAME_BC_HIGH: u32 = 0x1001C; pub(crate) const REG_BACKPLANE_WAKEUP_CTRL: u32 = 0x1001E; pub(crate) const REG_BACKPLANE_SLEEP_CSR: u32 = 0x1001F; -pub(crate) const I_HMB_SW_MASK: u32 = (0x000000f0); -pub(crate) const I_HMB_FC_CHANGE: u32 = (1 << 5); +pub(crate) const I_HMB_SW_MASK: u32 = 0x000000f0; +pub(crate) const I_HMB_FC_CHANGE: u32 = 1 << 5; pub(crate) const SDIO_INT_STATUS: u32 = 0x20; pub(crate) const SDIO_INT_HOST_MASK: u32 = 0x24; @@ -142,18 +142,6 @@ pub(crate) const MAX_PSK_LEN: usize = 64; // Bluetooth constants. pub(crate) const SPI_RESP_DELAY_F1: u32 = 0x001d; pub(crate) const WHD_BUS_SPI_BACKPLANE_READ_PADD_SIZE: u8 = 4; -pub(crate) const CYW43_BACKPLANE_READ_PAD_LEN_BYTES: u8 = 16; - -pub(crate) const BTFW_ADDR_MODE_UNKNOWN: i32 = 0; -pub(crate) const BTFW_ADDR_MODE_EXTENDED: i32 = 1; -pub(crate) const BTFW_ADDR_MODE_SEGMENT: i32 = 2; -pub(crate) const BTFW_ADDR_MODE_LINEAR32: i32 = 3; - -pub(crate) const BTFW_HEX_LINE_TYPE_DATA: u8 = 0; -pub(crate) const BTFW_HEX_LINE_TYPE_END_OF_DATA: u8 = 1; -pub(crate) const BTFW_HEX_LINE_TYPE_EXTENDED_SEGMENT_ADDRESS: u8 = 2; -pub(crate) const BTFW_HEX_LINE_TYPE_EXTENDED_ADDRESS: u8 = 4; -pub(crate) const BTFW_HEX_LINE_TYPE_ABSOLUTE_32BIT_ADDRESS: u8 = 5; pub(crate) const BT2WLAN_PWRUP_WAKE: u32 = 3; pub(crate) const BT2WLAN_PWRUP_ADDR: u32 = 0x640894; @@ -162,11 +150,11 @@ pub(crate) const BT_CTRL_REG_ADDR: u32 = 0x18000c7c; pub(crate) const HOST_CTRL_REG_ADDR: u32 = 0x18000d6c; pub(crate) const WLAN_RAM_BASE_REG_ADDR: u32 = 0x18000d68; -pub(crate) const BTSDIO_REG_DATA_VALID_BITMASK: u32 = (1 << 1); -pub(crate) const BTSDIO_REG_BT_AWAKE_BITMASK: u32 = (1 << 8); -pub(crate) const BTSDIO_REG_WAKE_BT_BITMASK: u32 = (1 << 17); -pub(crate) const BTSDIO_REG_SW_RDY_BITMASK: u32 = (1 << 24); -pub(crate) const BTSDIO_REG_FW_RDY_BITMASK: u32 = (1 << 24); +pub(crate) const BTSDIO_REG_DATA_VALID_BITMASK: u32 = 1 << 1; +pub(crate) const BTSDIO_REG_BT_AWAKE_BITMASK: u32 = 1 << 8; +pub(crate) const BTSDIO_REG_WAKE_BT_BITMASK: u32 = 1 << 17; +pub(crate) const BTSDIO_REG_SW_RDY_BITMASK: u32 = 1 << 24; +pub(crate) const BTSDIO_REG_FW_RDY_BITMASK: u32 = 1 << 24; // Security type (authentication and encryption types are combined using bit mask) #[allow(non_camel_case_types)] diff --git a/examples/rp/memory.x b/examples/rp/memory.x index 7bc60f88..aba861aa 100644 --- a/examples/rp/memory.x +++ b/examples/rp/memory.x @@ -2,4 +2,4 @@ MEMORY { BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100 FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100 RAM : ORIGIN = 0x20000000, LENGTH = 256K -} +} \ No newline at end of file