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Update stm32-data.

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This commit is contained in:
Dario Nieuwenhuis
2023-01-11 17:51:30 +01:00
parent ce842fe28c
commit 065a0a1ee7
6 changed files with 155 additions and 231 deletions
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30
embassy-stm32/build.rs
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@@ -277,22 +277,20 @@ fn main() {
(("dcmi", "PIXCLK"), quote!(crate::dcmi::PixClkPin)), (("dcmi", "PIXCLK"), quote!(crate::dcmi::PixClkPin)),
(("usb", "DP"), quote!(crate::usb::DpPin)), (("usb", "DP"), quote!(crate::usb::DpPin)),
(("usb", "DM"), quote!(crate::usb::DmPin)), (("usb", "DM"), quote!(crate::usb::DmPin)),
(("otgfs", "DP"), quote!(crate::usb_otg::DpPin)), (("otg", "DP"), quote!(crate::usb_otg::DpPin)),
(("otgfs", "DM"), quote!(crate::usb_otg::DmPin)), (("otg", "DM"), quote!(crate::usb_otg::DmPin)),
(("otghs", "DP"), quote!(crate::usb_otg::DpPin)), (("otg", "ULPI_CK"), quote!(crate::usb_otg::UlpiClkPin)),
(("otghs", "DM"), quote!(crate::usb_otg::DmPin)), (("otg", "ULPI_DIR"), quote!(crate::usb_otg::UlpiDirPin)),
(("otghs", "ULPI_CK"), quote!(crate::usb_otg::UlpiClkPin)), (("otg", "ULPI_NXT"), quote!(crate::usb_otg::UlpiNxtPin)),
(("otghs", "ULPI_DIR"), quote!(crate::usb_otg::UlpiDirPin)), (("otg", "ULPI_STP"), quote!(crate::usb_otg::UlpiStpPin)),
(("otghs", "ULPI_NXT"), quote!(crate::usb_otg::UlpiNxtPin)), (("otg", "ULPI_D0"), quote!(crate::usb_otg::UlpiD0Pin)),
(("otghs", "ULPI_STP"), quote!(crate::usb_otg::UlpiStpPin)), (("otg", "ULPI_D1"), quote!(crate::usb_otg::UlpiD1Pin)),
(("otghs", "ULPI_D0"), quote!(crate::usb_otg::UlpiD0Pin)), (("otg", "ULPI_D2"), quote!(crate::usb_otg::UlpiD2Pin)),
(("otghs", "ULPI_D1"), quote!(crate::usb_otg::UlpiD1Pin)), (("otg", "ULPI_D3"), quote!(crate::usb_otg::UlpiD3Pin)),
(("otghs", "ULPI_D2"), quote!(crate::usb_otg::UlpiD2Pin)), (("otg", "ULPI_D4"), quote!(crate::usb_otg::UlpiD4Pin)),
(("otghs", "ULPI_D3"), quote!(crate::usb_otg::UlpiD3Pin)), (("otg", "ULPI_D5"), quote!(crate::usb_otg::UlpiD5Pin)),
(("otghs", "ULPI_D4"), quote!(crate::usb_otg::UlpiD4Pin)), (("otg", "ULPI_D6"), quote!(crate::usb_otg::UlpiD6Pin)),
(("otghs", "ULPI_D5"), quote!(crate::usb_otg::UlpiD5Pin)), (("otg", "ULPI_D7"), quote!(crate::usb_otg::UlpiD7Pin)),
(("otghs", "ULPI_D6"), quote!(crate::usb_otg::UlpiD6Pin)),
(("otghs", "ULPI_D7"), quote!(crate::usb_otg::UlpiD7Pin)),
(("can", "TX"), quote!(crate::can::TxPin)), (("can", "TX"), quote!(crate::can::TxPin)),
(("can", "RX"), quote!(crate::can::RxPin)), (("can", "RX"), quote!(crate::can::RxPin)),
(("eth", "REF_CLK"), quote!(crate::eth::RefClkPin)), (("eth", "REF_CLK"), quote!(crate::eth::RefClkPin)),

2
embassy-stm32/src/lib.rs
View File

@@ -58,7 +58,7 @@ pub mod spi;
pub mod usart; pub mod usart;
#[cfg(all(usb, feature = "time"))] #[cfg(all(usb, feature = "time"))]
pub mod usb; pub mod usb;
#[cfg(any(otgfs, otghs))] #[cfg(otg)]
pub mod usb_otg; pub mod usb_otg;
#[cfg(iwdg)] #[cfg(iwdg)]

1
embassy-stm32/src/usb/usb.rs
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@@ -154,6 +154,7 @@ impl<'d, T: Instance> Driver<'d, T> {
block_for(Duration::from_millis(100)); block_for(Duration::from_millis(100));
#[cfg(not(usb_v4))]
regs.btable().write(|w| w.set_btable(0)); regs.btable().write(|w| w.set_btable(0));
dp.set_as_af(dp.af_num(), AFType::OutputPushPull); dp.set_as_af(dp.af_num(), AFType::OutputPushPull);

213
embassy-stm32/src/usb_otg.rs
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@@ -1,213 +0,0 @@
use core::marker::PhantomData;
use embassy_hal_common::into_ref;
use crate::gpio::sealed::AFType;
use crate::rcc::RccPeripheral;
use crate::{peripherals, Peripheral};
macro_rules! config_ulpi_pins {
($($pin:ident),*) => {
into_ref!($($pin),*);
// NOTE(unsafe) Exclusive access to the registers
critical_section::with(|_| unsafe {
$(
$pin.set_as_af($pin.af_num(), AFType::OutputPushPull);
#[cfg(gpio_v2)]
$pin.set_speed(crate::gpio::Speed::VeryHigh);
)*
})
};
}
/// USB PHY type
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
pub enum PhyType {
/// Internal Full-Speed PHY
///
/// Available on most High-Speed peripherals.
InternalFullSpeed,
/// Internal High-Speed PHY
///
/// Available on a few STM32 chips.
InternalHighSpeed,
/// External ULPI High-Speed PHY
ExternalHighSpeed,
}
pub struct UsbOtg<'d, T: Instance> {
phantom: PhantomData<&'d mut T>,
_phy_type: PhyType,
}
impl<'d, T: Instance> UsbOtg<'d, T> {
/// Initializes USB OTG peripheral with internal Full-Speed PHY
pub fn new_fs(
_peri: impl Peripheral<P = T> + 'd,
dp: impl Peripheral<P = impl DpPin<T>> + 'd,
dm: impl Peripheral<P = impl DmPin<T>> + 'd,
) -> Self {
into_ref!(dp, dm);
unsafe {
dp.set_as_af(dp.af_num(), AFType::OutputPushPull);
dm.set_as_af(dm.af_num(), AFType::OutputPushPull);
}
Self {
phantom: PhantomData,
_phy_type: PhyType::InternalFullSpeed,
}
}
/// Initializes USB OTG peripheral with external High-Speed PHY
pub fn new_hs_ulpi(
_peri: impl Peripheral<P = T> + 'd,
ulpi_clk: impl Peripheral<P = impl UlpiClkPin<T>> + 'd,
ulpi_dir: impl Peripheral<P = impl UlpiDirPin<T>> + 'd,
ulpi_nxt: impl Peripheral<P = impl UlpiNxtPin<T>> + 'd,
ulpi_stp: impl Peripheral<P = impl UlpiStpPin<T>> + 'd,
ulpi_d0: impl Peripheral<P = impl UlpiD0Pin<T>> + 'd,
ulpi_d1: impl Peripheral<P = impl UlpiD1Pin<T>> + 'd,
ulpi_d2: impl Peripheral<P = impl UlpiD2Pin<T>> + 'd,
ulpi_d3: impl Peripheral<P = impl UlpiD3Pin<T>> + 'd,
ulpi_d4: impl Peripheral<P = impl UlpiD4Pin<T>> + 'd,
ulpi_d5: impl Peripheral<P = impl UlpiD5Pin<T>> + 'd,
ulpi_d6: impl Peripheral<P = impl UlpiD6Pin<T>> + 'd,
ulpi_d7: impl Peripheral<P = impl UlpiD7Pin<T>> + 'd,
) -> Self {
config_ulpi_pins!(
ulpi_clk, ulpi_dir, ulpi_nxt, ulpi_stp, ulpi_d0, ulpi_d1, ulpi_d2, ulpi_d3, ulpi_d4, ulpi_d5, ulpi_d6,
ulpi_d7
);
Self {
phantom: PhantomData,
_phy_type: PhyType::ExternalHighSpeed,
}
}
}
impl<'d, T: Instance> Drop for UsbOtg<'d, T> {
fn drop(&mut self) {
T::reset();
T::disable();
}
}
pub(crate) mod sealed {
pub trait Instance {
const REGISTERS: *const ();
const HIGH_SPEED: bool;
const FIFO_DEPTH_WORDS: usize;
const ENDPOINT_COUNT: usize;
}
}
pub trait Instance: sealed::Instance + RccPeripheral {}
// Internal PHY pins
pin_trait!(DpPin, Instance);
pin_trait!(DmPin, Instance);
// External PHY pins
pin_trait!(UlpiClkPin, Instance);
pin_trait!(UlpiDirPin, Instance);
pin_trait!(UlpiNxtPin, Instance);
pin_trait!(UlpiStpPin, Instance);
pin_trait!(UlpiD0Pin, Instance);
pin_trait!(UlpiD1Pin, Instance);
pin_trait!(UlpiD2Pin, Instance);
pin_trait!(UlpiD3Pin, Instance);
pin_trait!(UlpiD4Pin, Instance);
pin_trait!(UlpiD5Pin, Instance);
pin_trait!(UlpiD6Pin, Instance);
pin_trait!(UlpiD7Pin, Instance);
foreach_peripheral!(
(otgfs, $inst:ident) => {
impl sealed::Instance for peripherals::$inst {
const REGISTERS: *const () = crate::pac::$inst.0 as *const ();
const HIGH_SPEED: bool = false;
cfg_if::cfg_if! {
if #[cfg(stm32f1)] {
const FIFO_DEPTH_WORDS: usize = 128;
const ENDPOINT_COUNT: usize = 8;
} else if #[cfg(any(
stm32f2,
stm32f401,
stm32f405,
stm32f407,
stm32f411,
stm32f415,
stm32f417,
stm32f427,
stm32f429,
stm32f437,
stm32f439,
))] {
const FIFO_DEPTH_WORDS: usize = 320;
const ENDPOINT_COUNT: usize = 4;
} else if #[cfg(any(
stm32f412,
stm32f413,
stm32f423,
stm32f446,
stm32f469,
stm32f479,
stm32f7,
stm32l4,
stm32u5,
))] {
const FIFO_DEPTH_WORDS: usize = 320;
const ENDPOINT_COUNT: usize = 6;
} else if #[cfg(stm32g0x1)] {
const FIFO_DEPTH_WORDS: usize = 512;
const ENDPOINT_COUNT: usize = 8;
} else {
compile_error!("USB_OTG_FS peripheral is not supported by this chip.");
}
}
}
impl Instance for peripherals::$inst {}
};
(otghs, $inst:ident) => {
impl sealed::Instance for peripherals::$inst {
const REGISTERS: *const () = crate::pac::$inst.0 as *const ();
const HIGH_SPEED: bool = true;
cfg_if::cfg_if! {
if #[cfg(any(
stm32f2,
stm32f405,
stm32f407,
stm32f415,
stm32f417,
stm32f427,
stm32f429,
stm32f437,
stm32f439,
))] {
const FIFO_DEPTH_WORDS: usize = 1024;
const ENDPOINT_COUNT: usize = 6;
} else if #[cfg(any(
stm32f446,
stm32f469,
stm32f479,
stm32f7,
stm32h7,
))] {
const FIFO_DEPTH_WORDS: usize = 1024;
const ENDPOINT_COUNT: usize = 9;
} else {
compile_error!("USB_OTG_HS peripheral is not supported by this chip.");
}
}
}
impl Instance for peripherals::$inst {}
};
);

138
embassy-stm32/src/usb_otg/mod.rs Normal file
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@@ -0,0 +1,138 @@
use embassy_cortex_m::interrupt::Interrupt;
use crate::peripherals;
use crate::rcc::RccPeripheral;
pub(crate) mod sealed {
pub trait Instance {
const HIGH_SPEED: bool;
const FIFO_DEPTH_WORDS: u16;
const ENDPOINT_COUNT: usize;
fn regs() -> crate::pac::otg::Otg;
}
}
pub trait Instance: sealed::Instance + RccPeripheral {
type Interrupt: Interrupt;
}
// Internal PHY pins
pin_trait!(DpPin, Instance);
pin_trait!(DmPin, Instance);
// External PHY pins
pin_trait!(UlpiClkPin, Instance);
pin_trait!(UlpiDirPin, Instance);
pin_trait!(UlpiNxtPin, Instance);
pin_trait!(UlpiStpPin, Instance);
pin_trait!(UlpiD0Pin, Instance);
pin_trait!(UlpiD1Pin, Instance);
pin_trait!(UlpiD2Pin, Instance);
pin_trait!(UlpiD3Pin, Instance);
pin_trait!(UlpiD4Pin, Instance);
pin_trait!(UlpiD5Pin, Instance);
pin_trait!(UlpiD6Pin, Instance);
pin_trait!(UlpiD7Pin, Instance);
foreach_interrupt!(
(USB_OTG_FS, otg, $block:ident, GLOBAL, $irq:ident) => {
impl sealed::Instance for peripherals::USB_OTG_FS {
const HIGH_SPEED: bool = false;
cfg_if::cfg_if! {
if #[cfg(stm32f1)] {
const FIFO_DEPTH_WORDS: u16 = 128;
const ENDPOINT_COUNT: usize = 8;
} else if #[cfg(any(
stm32f2,
stm32f401,
stm32f405,
stm32f407,
stm32f411,
stm32f415,
stm32f417,
stm32f427,
stm32f429,
stm32f437,
stm32f439,
))] {
const FIFO_DEPTH_WORDS: u16 = 320;
const ENDPOINT_COUNT: usize = 4;
} else if #[cfg(any(
stm32f412,
stm32f413,
stm32f423,
stm32f446,
stm32f469,
stm32f479,
stm32f7,
stm32l4,
stm32u5,
))] {
const FIFO_DEPTH_WORDS: u16 = 320;
const ENDPOINT_COUNT: usize = 6;
} else if #[cfg(stm32g0x1)] {
const FIFO_DEPTH_WORDS: u16 = 512;
const ENDPOINT_COUNT: usize = 8;
} else if #[cfg(stm32h7)] {
const FIFO_DEPTH_WORDS: u16 = 1024;
const ENDPOINT_COUNT: usize = 9;
} else {
compile_error!("USB_OTG_FS peripheral is not supported by this chip.");
}
}
fn regs() -> crate::pac::otg::Otg {
crate::pac::USB_OTG_FS
}
}
impl Instance for peripherals::USB_OTG_FS {
type Interrupt = crate::interrupt::$irq;
}
};
(USB_OTG_HS, otg, $block:ident, GLOBAL, $irq:ident) => {
impl sealed::Instance for peripherals::USB_OTG_HS {
const HIGH_SPEED: bool = true;
cfg_if::cfg_if! {
if #[cfg(any(
stm32f2,
stm32f405,
stm32f407,
stm32f415,
stm32f417,
stm32f427,
stm32f429,
stm32f437,
stm32f439,
))] {
const FIFO_DEPTH_WORDS: u16 = 1024;
const ENDPOINT_COUNT: usize = 6;
} else if #[cfg(any(
stm32f446,
stm32f469,
stm32f479,
stm32f7,
stm32h7,
))] {
const FIFO_DEPTH_WORDS: u16 = 1024;
const ENDPOINT_COUNT: usize = 9;
} else {
compile_error!("USB_OTG_HS peripheral is not supported by this chip.");
}
}
fn regs() -> crate::pac::otg::Otg {
// OTG HS registers are a superset of FS registers
crate::pac::otg::Otg(crate::pac::USB_OTG_HS.0)
}
}
impl Instance for peripherals::USB_OTG_HS {
type Interrupt = crate::interrupt::$irq;
}
};
);

2
stm32-data

Submodule stm32-data updated: 14a448c318...844793fc3d