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Adjust to DMA1EN in the rcc for l0.

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Bob McWhirter
2021-07-12 14:11:18 -04:00
parent d31e30f382
commit 06e899b14c
3 changed files with 4 additions and 4 deletions
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4
stm32-metapac-gen/src/lib.rs
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@ -390,8 +390,8 @@ pub fn gen(options: Options) {
if let Some(clock_prefix) = clock_prefix {
// Workaround for clock registers being split on some chip families. Assume fields are
// named after peripheral and look for first field matching and use that register.
let mut en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name));
let mut rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name));
let en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name));
let rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name));
match (en, rst) {
(Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => {