Enable SYSCFG clock in exti::init()
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ad7a1f1453
commit
06fb2a7a80
@ -108,4 +108,7 @@ pub(crate) unsafe fn init() {
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use embassy::interrupt::InterruptExt;
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use embassy::interrupt::InterruptExt;
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foreach_exti_irq!(enable_irq);
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foreach_exti_irq!(enable_irq);
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#[cfg(not(rcc_wb55))]
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<crate::peripherals::SYSCFG as crate::rcc::sealed::RccPeripheral>::enable();
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}
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}
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@ -17,7 +17,6 @@ use embassy_traits::gpio::{WaitForFallingEdge, WaitForRisingEdge};
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use example_common::*;
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use example_common::*;
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use cortex_m_rt::entry;
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use cortex_m_rt::entry;
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use embassy_stm32::pac;
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#[embassy::task]
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#[embassy::task]
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async fn main_task() {
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async fn main_task() {
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@ -42,14 +41,7 @@ static EXECUTOR: Forever<Executor> = Forever::new();
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fn main() -> ! {
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fn main() -> ! {
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info!("Hello World!");
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info!("Hello World!");
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unsafe {
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unsafe { Dbgmcu::enable_all() }
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Dbgmcu::enable_all();
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// EXTI clock
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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}
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let executor = EXECUTOR.put(Executor::new());
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let executor = EXECUTOR.put(Executor::new());
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@ -24,10 +24,6 @@ fn main() -> ! {
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w.set_dbg_standby(true);
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w.set_dbg_standby(true);
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w.set_dbg_stop(true);
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w.set_dbg_stop(true);
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});
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});
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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}
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}
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let p = embassy_stm32::init(Default::default());
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let p = embassy_stm32::init(Default::default());
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@ -55,10 +55,6 @@ fn main() -> ! {
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w.set_dbg_standby(true);
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w.set_dbg_standby(true);
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w.set_dbg_stop(true);
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w.set_dbg_stop(true);
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});
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});
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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}
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}
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unsafe { embassy::time::set_clock(&ZeroClock) };
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unsafe { embassy::time::set_clock(&ZeroClock) };
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@ -10,6 +10,7 @@
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mod example_common;
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mod example_common;
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use cortex_m_rt::entry;
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use cortex_m_rt::entry;
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::gpio::{Level, Output, Speed};
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use embassy_stm32::gpio::{Level, Output, Speed};
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use embassy_stm32::pac;
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use embassy_stm32::pac;
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use embassy_stm32::spi::{Config, Spi};
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use embassy_stm32::spi::{Config, Spi};
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@ -17,7 +18,6 @@ use embassy_stm32::time::Hertz;
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use embedded_hal::blocking::spi::Transfer;
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use embedded_hal::blocking::spi::Transfer;
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use embedded_hal::digital::v2::OutputPin;
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use embedded_hal::digital::v2::OutputPin;
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use example_common::*;
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use example_common::*;
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use embassy_stm32::dma::NoDma;
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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@ -29,10 +29,6 @@ fn main() -> ! {
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w.set_dbg_standby(true);
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w.set_dbg_standby(true);
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w.set_dbg_stop(true);
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w.set_dbg_stop(true);
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});
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});
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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}
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}
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let p = embassy_stm32::init(Default::default());
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let p = embassy_stm32::init(Default::default());
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@ -82,14 +82,6 @@ fn main() -> ! {
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w.set_dbg_stop(true);
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w.set_dbg_stop(true);
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});
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});
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//pac::RCC.apbenr().modify(|w| {
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//w.set_spi3en(true);
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// });
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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pac::RCC.ahb1enr().modify(|w| {
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pac::RCC.ahb1enr().modify(|w| {
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w.set_dmamux1en(true);
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w.set_dmamux1en(true);
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w.set_dma1en(true);
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w.set_dma1en(true);
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@ -63,10 +63,6 @@ fn main() -> ! {
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pac::RCC.apb1enr1().modify(|w| {
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pac::RCC.apb1enr1().modify(|w| {
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w.set_uart4en(true);
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w.set_uart4en(true);
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});
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});
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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}
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}
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unsafe { embassy::time::set_clock(&ZeroClock) };
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unsafe { embassy::time::set_clock(&ZeroClock) };
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@ -58,10 +58,6 @@ fn main() -> ! {
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w.set_dbg_stop(true);
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w.set_dbg_stop(true);
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});
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});
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pac::RCC.apb2enr().modify(|w| {
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w.set_syscfgen(true);
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});
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pac::RCC.ahb1enr().modify(|w| {
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pac::RCC.ahb1enr().modify(|w| {
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w.set_dmamux1en(true);
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w.set_dmamux1en(true);
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w.set_dma1en(true);
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w.set_dma1en(true);
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