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Enable SYSCFG clock in exti::init()

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This commit is contained in:
Timo Kröger 2021-07-22 23:12:07 +02:00 committed by Dario Nieuwenhuis
parent ad7a1f1453
commit 06fb2a7a80
8 changed files with 6 additions and 39 deletions
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3
embassy-stm32/src/exti/mod.rs
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@ -108,4 +108,7 @@ pub(crate) unsafe fn init() {
use embassy::interrupt::InterruptExt;
foreach_exti_irq!(enable_irq);
#[cfg(not(rcc_wb55))]
<crate::peripherals::SYSCFG as crate::rcc::sealed::RccPeripheral>::enable();
}

10
examples/stm32f4/src/bin/button_exti.rs
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@ -17,7 +17,6 @@ use embassy_traits::gpio::{WaitForFallingEdge, WaitForRisingEdge};
use example_common::*;
use cortex_m_rt::entry;
use embassy_stm32::pac;
#[embassy::task]
async fn main_task() {
@ -42,14 +41,7 @@ static EXECUTOR: Forever<Executor> = Forever::new();
fn main() -> ! {
info!("Hello World!");
unsafe {
Dbgmcu::enable_all();
// EXTI clock
pac::RCC.apb2enr().modify(|w| {
w.set_syscfgen(true);
});
}
unsafe { Dbgmcu::enable_all() }
let executor = EXECUTOR.put(Executor::new());

4
examples/stm32l4/src/bin/button.rs
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@ -24,10 +24,6 @@ fn main() -> ! {
w.set_dbg_standby(true);
w.set_dbg_stop(true);
});
pac::RCC.apb2enr().modify(|w| {
w.set_syscfgen(true);
});
}
let p = embassy_stm32::init(Default::default());

4
examples/stm32l4/src/bin/button_exti.rs
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@ -55,10 +55,6 @@ fn main() -> ! {
w.set_dbg_standby(true);
w.set_dbg_stop(true);
});
pac::RCC.apb2enr().modify(|w| {
w.set_syscfgen(true);
});
}
unsafe { embassy::time::set_clock(&ZeroClock) };

6
examples/stm32l4/src/bin/spi.rs
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@ -10,6 +10,7 @@
mod example_common;
use cortex_m_rt::entry;
use embassy_stm32::dma::NoDma;
use embassy_stm32::gpio::{Level, Output, Speed};
use embassy_stm32::pac;
use embassy_stm32::spi::{Config, Spi};
@ -17,7 +18,6 @@ use embassy_stm32::time::Hertz;
use embedded_hal::blocking::spi::Transfer;
use embedded_hal::digital::v2::OutputPin;
use example_common::*;
use embassy_stm32::dma::NoDma;
#[entry]
fn main() -> ! {
@ -29,10 +29,6 @@ fn main() -> ! {
w.set_dbg_standby(true);
w.set_dbg_stop(true);
});
pac::RCC.apb2enr().modify(|w| {
w.set_syscfgen(true);
});
}
let p = embassy_stm32::init(Default::default());

8
examples/stm32l4/src/bin/spi_dma.rs
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@ -82,14 +82,6 @@ fn main() -> ! {
w.set_dbg_stop(true);
});
//pac::RCC.apbenr().modify(|w| {
//w.set_spi3en(true);
// });
pac::RCC.apb2enr().modify(|w| {
w.set_syscfgen(true);
});
pac::RCC.ahb1enr().modify(|w| {
w.set_dmamux1en(true);
w.set_dma1en(true);

4
examples/stm32l4/src/bin/usart.rs
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@ -63,10 +63,6 @@ fn main() -> ! {
pac::RCC.apb1enr1().modify(|w| {
w.set_uart4en(true);
});
pac::RCC.apb2enr().modify(|w| {
w.set_syscfgen(true);
});
}
unsafe { embassy::time::set_clock(&ZeroClock) };

4
examples/stm32l4/src/bin/usart_dma.rs
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@ -58,10 +58,6 @@ fn main() -> ! {
w.set_dbg_stop(true);
});
pac::RCC.apb2enr().modify(|w| {
w.set_syscfgen(true);
});
pac::RCC.ahb1enr().modify(|w| {
w.set_dmamux1en(true);
w.set_dma1en(true);