Add PLL config support for F2
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@ -53,7 +53,7 @@ pub struct Clocks {
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#[cfg(any(rcc_h7, rcc_h7ab))]
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pub ahb4: Hertz,
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#[cfg(any(rcc_f4, rcc_f410, rcc_f7))]
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#[cfg(any(rcc_f2, rcc_f4, rcc_f410, rcc_f7))]
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pub pll48: Option<Hertz>,
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#[cfg(rcc_f1)]
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