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Merge pull request #2054 from xoviat/rcc-mux

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rcc mux: update metapac
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xoviat 2023-10-14 04:07:38 +00:00 committed by GitHub
commit 0aa99e66f7
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4 changed files with 41 additions and 38 deletions
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4
embassy-stm32/Cargo.toml
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@ -58,7 +58,7 @@ rand_core = "0.6.3"
sdio-host = "0.5.0"
embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
critical-section = "1.1"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bfa5a0dcec6a9bd42cea94ba11eeae1a17a7f2c" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e4a769aa67aa82603448377daa579d67a789983a" }
vcell = "0.1.3"
bxcan = "0.7.0"
nb = "1.0.0"
@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
[build-dependencies]
proc-macro2 = "1.0.36"
quote = "1.0.15"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bfa5a0dcec6a9bd42cea94ba11eeae1a17a7f2c", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e4a769aa67aa82603448377daa579d67a789983a", default-features = false, features = ["metadata"]}
[features]

23
embassy-stm32/build.rs
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@ -5,7 +5,7 @@ use std::{env, fs};
use proc_macro2::{Ident, TokenStream};
use quote::{format_ident, quote};
use stm32_metapac::metadata::ir::{BlockItemInner, Enum};
use stm32_metapac::metadata::ir::{BlockItemInner, Enum, FieldSet};
use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccRegister, METADATA};
fn main() {
@ -400,29 +400,24 @@ fn main() {
.ir;
let rcc_blocks = rcc_registers.blocks.iter().find(|b| b.name == "Rcc").unwrap().items;
let rcc_fieldsets: HashMap<&str, &FieldSet> = rcc_registers.fieldsets.iter().map(|f| (f.name, f)).collect();
let rcc_enums: HashMap<&str, &Enum> = rcc_registers.enums.iter().map(|e| (e.name, e)).collect();
let rcc_block_item_map: HashMap<&str, &str> = rcc_blocks
rcc_blocks
.iter()
.filter_map(|b| match &b.inner {
BlockItemInner::Register(register) => register.fieldset.map(|f| (f, b.name)),
BlockItemInner::Register(register) => register.fieldset.map(|f| (b.name, f)),
_ => None,
})
.collect();
let rcc_enum_map: HashMap<&str, &Enum> = rcc_registers.enums.iter().map(|e| (e.name, e)).collect();
rcc_registers
.fieldsets
.iter()
.filter_map(|f| {
rcc_block_item_map.get(f.name).map(|b| {
.filter_map(|(b, f)| {
rcc_fieldsets.get(f).map(|f| {
(
*b,
b,
f.fields
.iter()
.filter_map(|f| {
let enumm = f.enumm?;
let enumm = rcc_enum_map.get(enumm)?;
let enumm = rcc_enums.get(enumm)?;
Some((f.name, *enumm))
})

28
embassy-stm32/src/rcc/h.rs
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@ -457,8 +457,8 @@ pub(crate) unsafe fn init(config: Config) {
AdcClockSource::SYSCLK => Some(sys),
AdcClockSource::PLL2_R => pll2.r,
AdcClockSource::HSE => hse,
AdcClockSource::HSI_KER => hsi,
AdcClockSource::CSI_KER => csi,
AdcClockSource::HSI => hsi,
AdcClockSource::CSI => csi,
_ => unreachable!(),
};
@ -547,15 +547,25 @@ pub(crate) unsafe fn init(config: Config) {
rtc,
#[cfg(stm32h5)]
mux_rcc_pclk1: Some(apb1),
mux_apb1: Some(apb1),
#[cfg(stm32h5)]
mux_apb2: Some(apb2),
#[cfg(stm32h5)]
mux_apb3: Some(apb3),
#[cfg(stm32h5)]
mux_apb4: None,
#[cfg(stm32h5)]
mux_rcc_hclk4: None,
#[cfg(stm32h5)]
mux_pll2_q: None,
#[cfg(stm32h5)]
mux_pll3_q: None,
#[cfg(stm32h5)]
mux_hsi_ker: None,
mux_hsi: None,
#[cfg(stm32h5)]
mux_csi_ker: None,
mux_csi: None,
#[cfg(stm32h5)]
mux_lse: None,
#[cfg(stm32h5)]
@ -574,20 +584,14 @@ pub(crate) unsafe fn init(config: Config) {
#[cfg(all(not(rcc_h5), stm32h5))]
mux_pll3_r: None,
#[cfg(stm32h5)]
mux_rcc_pclk3: Some(apb3),
#[cfg(stm32h5)]
mux_pll3_1: None,
#[cfg(stm32h5)]
mux_hsi48_ker: None,
#[cfg(stm32h5)]
mux_lsi_ker: None,
mux_lsi: None,
#[cfg(stm32h5)]
mux_pll2_r: pll2.r,
#[cfg(stm32h5)]
mux_rcc_pclk2: Some(apb2),
#[cfg(stm32h5)]
mux_rcc_pclk4: None,
#[cfg(stm32h5)]
mux_hse: hse,
#[cfg(stm32h5)]

24
embassy-stm32/src/rcc/mod.rs
View File

@ -136,15 +136,25 @@ pub struct Clocks {
pub rtc: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_rcc_pclk1: Option<Hertz>,
pub mux_apb1: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_apb2: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_apb3: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_apb4: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_rcc_hclk4: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_pll2_q: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_pll3_q: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_hsi_ker: Option<Hertz>,
pub mux_hsi: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_csi_ker: Option<Hertz>,
pub mux_csi: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_lse: Option<Hertz>,
@ -162,20 +172,14 @@ pub struct Clocks {
#[cfg(stm32h5)]
pub mux_pll3_r: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_rcc_pclk3: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_pll3_1: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_hsi48_ker: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_lsi_ker: Option<Hertz>,
pub mux_lsi: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_pll2_r: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_rcc_pclk2: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_rcc_pclk4: Option<Hertz>,
#[cfg(stm32h5)]
pub mux_hse: Option<Hertz>,
#[cfg(stm32h5)]