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eth-v2: Enable clocks in new

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Thales Fragoso 2021-06-10 23:42:20 -03:00 committed by Dario Nieuwenhuis
parent e039c7c42c
commit 0c837f07c0
1 changed files with 15 additions and 1 deletions
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16
embassy-stm32/src/eth/v2/mod.rs
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@ -12,7 +12,7 @@ use crate::gpio::sealed::Pin as __GpioPin;
use crate::gpio::AnyPin; use crate::gpio::AnyPin;
use crate::gpio::Pin as GpioPin; use crate::gpio::Pin as GpioPin;
use crate::pac::gpio::vals::Ospeedr; use crate::pac::gpio::vals::Ospeedr;
use crate::pac::ETH; use crate::pac::{ETH, RCC, SYSCFG};
use crate::peripherals; use crate::peripherals;
use crate::time::Hertz; use crate::time::Hertz;
@ -49,6 +49,20 @@ impl<'d, P: PHY, const TX: usize, const RX: usize> Ethernet<'d, P, TX, RX> {
) -> Self { ) -> Self {
unborrow!(interrupt, ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en); unborrow!(interrupt, ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en);
// Enable the necessary Clocks
// NOTE(unsafe) We have exclusive access to the registers
critical_section::with(|_| unsafe {
RCC.apb4enr().modify(|w| w.set_syscfgen(true));
RCC.ahb1enr().modify(|w| {
w.set_eth1macen(true);
w.set_eth1txen(true);
w.set_eth1rxen(true);
});
// RMII
SYSCFG.pmcr().modify(|w| w.set_epis(0b100));
});
ref_clk.configure(); ref_clk.configure();
mdio.configure(); mdio.configure();
mdc.configure(); mdc.configure();