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Merge branch 'main' of https://github.com/embassy-rs/embassy into tl-mbox-2

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This commit is contained in:
xoviat
2023-06-19 21:18:46 -05:00
parent 978e7b5e77 37a1e9f971
commit 0d67ef795e
69 changed files with 2911 additions and 3581 deletions
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4
examples/stm32f0/src/bin/wdg.rs
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@ -16,10 +16,10 @@ async fn main(_spawner: Spawner) {
let mut wdg = IndependentWatchdog::new(p.IWDG, 20_000_00);
info!("Watchdog start");
unsafe { wdg.unleash() };
wdg.unleash();
loop {
Timer::after(Duration::from_secs(1)).await;
unsafe { wdg.pet() };
wdg.pet();
}
}

8
examples/stm32f4/src/bin/wdt.rs
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@ -17,9 +17,7 @@ async fn main(_spawner: Spawner) {
let mut led = Output::new(p.PB7, Level::High, Speed::Low);
let mut wdt = IndependentWatchdog::new(p.IWDG, 1_000_000);
unsafe {
wdt.unleash();
}
wdt.unleash();
let mut i = 0;
@ -36,9 +34,7 @@ async fn main(_spawner: Spawner) {
// MCU should restart in 1 second after the last pet.
if i < 5 {
info!("Petting watchdog");
unsafe {
wdt.pet();
}
wdt.pet();
}
i += 1;

4
examples/stm32g4/src/bin/usb_serial.rs
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@ -38,9 +38,7 @@ async fn main(_spawner: Spawner) {
let p = embassy_stm32::init(config);
info!("Hello World!");
unsafe {
pac::RCC.ccipr().write(|w| w.set_clk48sel(0b10));
}
pac::RCC.ccipr().write(|w| w.set_clk48sel(0b10));
let driver = Driver::new(p.USB, Irqs, p.PA12, p.PA11);

8
examples/stm32h5/src/bin/usb_serial.rs
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@ -45,11 +45,9 @@ async fn main(_spawner: Spawner) {
info!("Hello World!");
unsafe {
pac::RCC.ccipr4().write(|w| {
w.set_usbsel(pac::rcc::vals::Usbsel::HSI48);
});
}
pac::RCC.ccipr4().write(|w| {
w.set_usbsel(pac::rcc::vals::Usbsel::HSI48);
});
// Create the driver, from the HAL.
let driver = Driver::new(p.USB, Irqs, p.PA12, p.PA11);

54
examples/stm32h7/src/bin/low_level_timer_api.rs
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@ -62,49 +62,39 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
T::enable();
<T as embassy_stm32::rcc::low_level::RccPeripheral>::reset();
unsafe {
ch1.set_speed(Speed::VeryHigh);
ch1.set_as_af(ch1.af_num(), AFType::OutputPushPull);
ch2.set_speed(Speed::VeryHigh);
ch2.set_as_af(ch1.af_num(), AFType::OutputPushPull);
ch3.set_speed(Speed::VeryHigh);
ch3.set_as_af(ch1.af_num(), AFType::OutputPushPull);
ch4.set_speed(Speed::VeryHigh);
ch4.set_as_af(ch1.af_num(), AFType::OutputPushPull);
}
ch1.set_speed(Speed::VeryHigh);
ch1.set_as_af(ch1.af_num(), AFType::OutputPushPull);
ch2.set_speed(Speed::VeryHigh);
ch2.set_as_af(ch1.af_num(), AFType::OutputPushPull);
ch3.set_speed(Speed::VeryHigh);
ch3.set_as_af(ch1.af_num(), AFType::OutputPushPull);
ch4.set_speed(Speed::VeryHigh);
ch4.set_as_af(ch1.af_num(), AFType::OutputPushPull);
let mut this = Self { inner: tim };
this.set_freq(freq);
this.inner.start();
unsafe {
T::regs_gp32()
.ccmr_output(0)
.modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into()));
T::regs_gp32()
.ccmr_output(0)
.modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into()));
T::regs_gp32()
.ccmr_output(1)
.modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into()));
T::regs_gp32()
.ccmr_output(1)
.modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into()));
}
let r = T::regs_gp32();
r.ccmr_output(0)
.modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into()));
r.ccmr_output(0)
.modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into()));
r.ccmr_output(1)
.modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into()));
r.ccmr_output(1)
.modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into()));
this
}
pub fn enable(&mut self, channel: Channel) {
unsafe {
T::regs_gp32().ccer().modify(|w| w.set_cce(channel.raw(), true));
}
T::regs_gp32().ccer().modify(|w| w.set_cce(channel.raw(), true));
}
pub fn disable(&mut self, channel: Channel) {
unsafe {
T::regs_gp32().ccer().modify(|w| w.set_cce(channel.raw(), false));
}
T::regs_gp32().ccer().modify(|w| w.set_cce(channel.raw(), false));
}
pub fn set_freq(&mut self, freq: Hertz) {
@ -112,11 +102,11 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
}
pub fn get_max_duty(&self) -> u32 {
unsafe { T::regs_gp32().arr().read().arr() }
T::regs_gp32().arr().read().arr()
}
pub fn set_duty(&mut self, channel: Channel, duty: u32) {
defmt::assert!(duty < self.get_max_duty());
unsafe { T::regs_gp32().ccr(channel.raw()).modify(|w| w.set_ccr(duty)) }
T::regs_gp32().ccr(channel.raw()).modify(|w| w.set_ccr(duty))
}
}

4
examples/stm32h7/src/bin/wdg.rs
View File

@ -15,10 +15,10 @@ async fn main(_spawner: Spawner) {
let mut wdg = IndependentWatchdog::new(p.IWDG1, 20_000_000);
unsafe { wdg.unleash() };
wdg.unleash();
loop {
Timer::after(Duration::from_secs(1)).await;
unsafe { wdg.pet() };
wdg.pet();
}
}

10
examples/stm32l4/src/bin/adc.rs
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@ -12,12 +12,10 @@ use {defmt_rtt as _, panic_probe as _};
fn main() -> ! {
info!("Hello World!");
unsafe {
pac::RCC.ccipr().modify(|w| {
w.set_adcsel(0b11);
});
pac::RCC.ahb2enr().modify(|w| w.set_adcen(true));
}
pac::RCC.ccipr().modify(|w| {
w.set_adcsel(0b11);
});
pac::RCC.ahb2enr().modify(|w| w.set_adcen(true));
let p = embassy_stm32::init(Default::default());

8
examples/stm32l4/src/bin/dac.rs
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@ -11,11 +11,9 @@ use {defmt_rtt as _, panic_probe as _};
fn main() -> ! {
info!("Hello World!");
unsafe {
pac::RCC.apb1enr1().modify(|w| {
w.set_dac1en(true);
});
}
pac::RCC.apb1enr1().modify(|w| {
w.set_dac1en(true);
});
let p = embassy_stm32::init(Default::default());

2
examples/stm32wl/src/bin/lora_lorawan.rs
View File

@ -35,7 +35,7 @@ async fn main(_spawner: Spawner) {
config.rcc.enable_lsi = true; // enable RNG
let p = embassy_stm32::init(config);
unsafe { pac::RCC.ccipr().modify(|w| w.set_rngsel(0b01)) }
pac::RCC.ccipr().modify(|w| w.set_rngsel(0b01));
let spi = Spi::new_subghz(p.SUBGHZSPI, p.DMA1_CH1, p.DMA1_CH2);

8
examples/stm32wl/src/bin/random.rs
View File

@ -15,11 +15,9 @@ async fn main(_spawner: Spawner) {
config.rcc.enable_lsi = true; //Needed for RNG to work
let p = embassy_stm32::init(config);
unsafe {
pac::RCC.ccipr().modify(|w| {
w.set_rngsel(0b01);
});
}
pac::RCC.ccipr().modify(|w| {
w.set_rngsel(0b01);
});
info!("Hello World!");