Use async spi transaction helper macro.
This commit is contained in:
parent
c385bbf07d
commit
0d84533bcb
176
src/lib.rs
176
src/lib.rs
@ -23,7 +23,7 @@ use embassy_sync::blocking_mutex::raw::NoopRawMutex;
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use embassy_sync::channel::Channel;
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use embassy_sync::channel::Channel;
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use embassy_time::{block_for, Duration, Timer};
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use embassy_time::{block_for, Duration, Timer};
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use embedded_hal_1::digital::OutputPin;
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use embedded_hal_1::digital::OutputPin;
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use embedded_hal_async::spi::{SpiBusRead, SpiBusWrite, SpiDevice};
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use embedded_hal_async::spi::{transaction, SpiBusRead, SpiBusWrite, SpiDevice};
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use self::structs::*;
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use self::structs::*;
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use crate::events::Event;
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use crate::events::Event;
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@ -753,17 +753,13 @@ where
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let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len);
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let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len);
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[cmd]).await?;
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let bus = unsafe { &mut *bus };
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bus.read(&mut buf[..(len as usize + 3) / 4]).await?;
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async {
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Ok(())
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bus.write(&[cmd]).await?;
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})
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bus.read(&mut buf[..(len as usize + 3) / 4]).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]);
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trace!("rx {:02x}", &slice8_mut(&mut buf)[..(len as usize).min(48)]);
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@ -817,17 +813,13 @@ where
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trace!(" {:02x}", &buf8[..total_len.min(48)]);
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trace!(" {:02x}", &buf8[..total_len.min(48)]);
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _);
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _);
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[cmd]).await?;
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let bus = unsafe { &mut *bus };
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bus.write(&buf[..(total_len / 4)]).await?;
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async {
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Ok(())
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bus.write(&[cmd]).await?;
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})
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bus.write(&buf[..(total_len / 4)]).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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}
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}
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fn rx(&mut self, packet: &[u8]) {
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fn rx(&mut self, packet: &[u8]) {
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@ -1012,17 +1004,13 @@ where
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _);
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, total_len as _);
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[cmd]).await?;
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let bus = unsafe { &mut *bus };
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bus.write(&buf[..total_len / 4]).await?;
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async {
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Ok(())
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bus.write(&[cmd]).await?;
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})
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bus.write(&buf[..total_len / 4]).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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}
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}
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async fn core_disable(&mut self, core: Core) {
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async fn core_disable(&mut self, core: Core) {
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@ -1101,23 +1089,19 @@ where
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let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32);
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let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32);
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[cmd]).await?;
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let bus = unsafe { &mut *bus };
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async {
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bus.write(&[cmd]).await?;
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// 4-byte response delay.
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// 4-byte response delay.
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let mut junk = [0; 1];
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let mut junk = [0; 1];
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bus.read(&mut junk).await?;
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bus.read(&mut junk).await?;
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// Read data
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// Read data
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bus.read(&mut data[..len / 4]).await?;
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bus.read(&mut data[..len / 4]).await?;
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Ok(())
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Ok(())
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}
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})
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})
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.await
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.await
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.unwrap();
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.unwrap();
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// Advance ptr.
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// Advance ptr.
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addr += len as u32;
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addr += len as u32;
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@ -1146,17 +1130,13 @@ where
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32);
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32);
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[cmd]).await?;
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let bus = unsafe { &mut *bus };
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bus.write(&buf[..(len + 3) / 4]).await?;
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async {
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Ok(())
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bus.write(&[cmd]).await?;
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})
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bus.write(&buf[..(len + 3) / 4]).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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// Advance ptr.
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// Advance ptr.
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addr += len as u32;
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addr += len as u32;
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@ -1270,21 +1250,17 @@ where
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let cmd = cmd_word(READ, INC_ADDR, func, addr, len);
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let cmd = cmd_word(READ, INC_ADDR, func, addr, len);
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let mut buf = [0; 1];
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let mut buf = [0; 1];
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[cmd]).await?;
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let bus = unsafe { &mut *bus };
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if func == FUNC_BACKPLANE {
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async {
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// 4-byte response delay.
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bus.write(&[cmd]).await?;
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bus.read(&mut buf).await?;
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if func == FUNC_BACKPLANE {
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}
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// 4-byte response delay.
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bus.read(&mut buf).await?;
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bus.read(&mut buf).await?;
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Ok(())
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}
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})
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bus.read(&mut buf).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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buf[0]
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buf[0]
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}
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}
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@ -1292,33 +1268,25 @@ where
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async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) {
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async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) {
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let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len);
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let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len);
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[cmd, val]).await?;
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let bus = unsafe { &mut *bus };
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Ok(())
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async {
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})
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bus.write(&[cmd, val]).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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}
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}
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async fn read32_swapped(&mut self, addr: u32) -> u32 {
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async fn read32_swapped(&mut self, addr: u32) -> u32 {
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let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4);
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let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4);
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let mut buf = [0; 1];
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let mut buf = [0; 1];
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[swap16(cmd)]).await?;
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let bus = unsafe { &mut *bus };
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bus.read(&mut buf).await?;
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async {
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Ok(())
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bus.write(&[swap16(cmd)]).await?;
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})
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bus.read(&mut buf).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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swap16(buf[0])
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swap16(buf[0])
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}
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}
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@ -1326,16 +1294,12 @@ where
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async fn write32_swapped(&mut self, addr: u32, val: u32) {
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async fn write32_swapped(&mut self, addr: u32, val: u32) {
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4);
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let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4);
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self.spi
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transaction!(&mut self.spi, |bus| async {
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.transaction(|bus| {
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bus.write(&[swap16(cmd), swap16(val)]).await?;
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let bus = unsafe { &mut *bus };
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Ok(())
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async {
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})
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bus.write(&[swap16(cmd), swap16(val)]).await?;
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.await
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Ok(())
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.unwrap();
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}
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})
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.await
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.unwrap();
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}
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}
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}
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}
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