Merge pull request #1729 from mattico/i2c-async-timeout
stm32: add async timeout functions to I2c and TimeoutI2c
This commit is contained in:
commit
0d8a9b1e7a
@ -22,11 +22,93 @@ fn timeout_fn(timeout: Duration) -> impl Fn() -> Result<(), Error> {
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}
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}
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}
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}
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impl<'a, 'd, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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pub fn new(i2c: &'a mut I2c<'d, T, TXDMA, RXDMA>, timeout: Duration) -> Self {
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pub fn new(i2c: &'a mut I2c<'d, T, TXDMA, RXDMA>, timeout: Duration) -> Self {
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Self { i2c, timeout }
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Self { i2c, timeout }
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}
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}
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// =========================
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// Async public API
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#[cfg(i2c_v2)]
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pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
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where
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TXDMA: crate::i2c::TxDma<T>,
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{
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self.write_timeout(address, write, self.timeout).await
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}
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#[cfg(i2c_v2)]
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pub async fn write_timeout(&mut self, address: u8, write: &[u8], timeout: Duration) -> Result<(), Error>
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where
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TXDMA: crate::i2c::TxDma<T>,
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{
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self.i2c.write_timeout(address, write, timeout_fn(timeout)).await
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}
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#[cfg(i2c_v2)]
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pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
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where
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TXDMA: crate::i2c::TxDma<T>,
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{
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self.write_vectored_timeout(address, write, self.timeout).await
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}
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#[cfg(i2c_v2)]
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pub async fn write_vectored_timeout(&mut self, address: u8, write: &[&[u8]], timeout: Duration) -> Result<(), Error>
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where
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TXDMA: crate::i2c::TxDma<T>,
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{
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self.i2c
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.write_vectored_timeout(address, write, timeout_fn(timeout))
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.await
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}
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#[cfg(i2c_v2)]
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pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
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where
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RXDMA: crate::i2c::RxDma<T>,
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{
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self.read_timeout(address, buffer, self.timeout).await
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}
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#[cfg(i2c_v2)]
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pub async fn read_timeout(&mut self, address: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error>
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where
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RXDMA: crate::i2c::RxDma<T>,
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{
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self.i2c.read_timeout(address, buffer, timeout_fn(timeout)).await
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}
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#[cfg(i2c_v2)]
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pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
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where
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TXDMA: super::TxDma<T>,
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RXDMA: super::RxDma<T>,
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{
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self.write_read_timeout(address, write, read, self.timeout).await
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}
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#[cfg(i2c_v2)]
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pub async fn write_read_timeout(
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&mut self,
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address: u8,
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write: &[u8],
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read: &mut [u8],
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timeout: Duration,
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) -> Result<(), Error>
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where
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TXDMA: super::TxDma<T>,
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RXDMA: super::RxDma<T>,
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{
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self.i2c
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.write_read_timeout(address, write, read, timeout_fn(timeout))
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.await
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}
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// =========================
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// Blocking public API
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/// Blocking read with a custom timeout
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/// Blocking read with a custom timeout
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pub fn blocking_read_timeout(&mut self, addr: u8, read: &mut [u8], timeout: Duration) -> Result<(), Error> {
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pub fn blocking_read_timeout(&mut self, addr: u8, read: &mut [u8], timeout: Duration) -> Result<(), Error> {
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self.i2c.blocking_read_timeout(addr, read, timeout_fn(timeout))
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self.i2c.blocking_read_timeout(addr, read, timeout_fn(timeout))
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@ -65,7 +147,9 @@ impl<'a, 'd, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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}
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}
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}
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}
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impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Read for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Read
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for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
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{
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type Error = Error;
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type Error = Error;
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fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
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fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
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@ -73,7 +157,9 @@ impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Read for
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}
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}
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}
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}
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impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Write for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Write
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for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
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{
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type Error = Error;
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type Error = Error;
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fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
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fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
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@ -81,7 +167,7 @@ impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Write fo
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}
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}
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}
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}
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impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::WriteRead
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impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::WriteRead
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for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
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for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
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{
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{
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type Error = Error;
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type Error = Error;
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@ -95,11 +181,11 @@ impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::WriteRea
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mod eh1 {
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mod eh1 {
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use super::*;
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use super::*;
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impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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type Error = Error;
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type Error = Error;
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}
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}
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impl<'a, 'd, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::I2c for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::I2c for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
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fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
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fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_read(address, read)
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self.blocking_read(address, read)
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}
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}
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@ -595,17 +595,41 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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// Async public API
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// Async public API
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pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
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pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
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where
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TXDMA: crate::i2c::TxDma<T>,
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{
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self.write_timeout(address, write, || Ok(())).await
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}
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pub async fn write_timeout(
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&mut self,
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address: u8,
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write: &[u8],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error>
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where
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where
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TXDMA: crate::i2c::TxDma<T>,
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TXDMA: crate::i2c::TxDma<T>,
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{
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{
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if write.is_empty() {
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if write.is_empty() {
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self.write_internal(address, write, true, || Ok(()))
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self.write_internal(address, write, true, check_timeout)
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} else {
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} else {
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self.write_dma_internal(address, write, true, true, || Ok(())).await
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self.write_dma_internal(address, write, true, true, check_timeout).await
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}
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}
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}
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}
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pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
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pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
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where
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TXDMA: crate::i2c::TxDma<T>,
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{
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self.write_vectored_timeout(address, write, || Ok(())).await
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}
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pub async fn write_vectored_timeout(
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&mut self,
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address: u8,
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write: &[&[u8]],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error>
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where
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where
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TXDMA: crate::i2c::TxDma<T>,
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TXDMA: crate::i2c::TxDma<T>,
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{
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{
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@ -620,7 +644,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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let next = iter.next();
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let next = iter.next();
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let is_last = next.is_none();
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let is_last = next.is_none();
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self.write_dma_internal(address, c, first, is_last, || Ok(())).await?;
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self.write_dma_internal(address, c, first, is_last, || check_timeout())
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.await?;
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first = false;
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first = false;
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current = next;
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current = next;
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}
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}
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@ -628,31 +653,58 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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}
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}
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pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
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pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
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where
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RXDMA: crate::i2c::RxDma<T>,
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{
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self.read_timeout(address, buffer, || Ok(())).await
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}
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pub async fn read_timeout(
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&mut self,
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address: u8,
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buffer: &mut [u8],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error>
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where
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where
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RXDMA: crate::i2c::RxDma<T>,
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RXDMA: crate::i2c::RxDma<T>,
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{
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{
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if buffer.is_empty() {
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if buffer.is_empty() {
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self.read_internal(address, buffer, false, || Ok(()))
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self.read_internal(address, buffer, false, check_timeout)
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} else {
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} else {
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self.read_dma_internal(address, buffer, false, || Ok(())).await
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self.read_dma_internal(address, buffer, false, check_timeout).await
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}
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}
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}
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}
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pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
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pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
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where
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TXDMA: super::TxDma<T>,
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RXDMA: super::RxDma<T>,
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{
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self.write_read_timeout(address, write, read, || Ok(())).await
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}
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pub async fn write_read_timeout(
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&mut self,
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address: u8,
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write: &[u8],
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read: &mut [u8],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error>
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where
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where
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TXDMA: super::TxDma<T>,
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TXDMA: super::TxDma<T>,
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RXDMA: super::RxDma<T>,
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RXDMA: super::RxDma<T>,
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{
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{
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if write.is_empty() {
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if write.is_empty() {
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self.write_internal(address, write, false, || Ok(()))?;
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self.write_internal(address, write, false, || check_timeout())?;
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} else {
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} else {
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self.write_dma_internal(address, write, true, true, || Ok(())).await?;
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self.write_dma_internal(address, write, true, true, || check_timeout())
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.await?;
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}
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}
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if read.is_empty() {
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if read.is_empty() {
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self.read_internal(address, read, true, || Ok(()))?;
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self.read_internal(address, read, true, check_timeout)?;
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} else {
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} else {
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self.read_dma_internal(address, read, true, || Ok(())).await?;
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self.read_dma_internal(address, read, true, check_timeout).await?;
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}
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}
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Ok(())
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Ok(())
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