Fix set_baudrate on RP-PICO
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@ -405,10 +405,6 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
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Parity::ParityEven => (true, true),
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Parity::ParityEven => (true, true),
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};
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};
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// PL011 needs a (dummy) line control register write to latch in the
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// divisors. We don't want to actually change LCR contents here.
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r.uartlcr_h().modify(|_| {});
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r.uartlcr_h().write(|w| {
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r.uartlcr_h().write(|w| {
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w.set_wlen(config.data_bits.bits());
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w.set_wlen(config.data_bits.bits());
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w.set_stp2(config.stop_bits == StopBits::STOP2);
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w.set_stp2(config.stop_bits == StopBits::STOP2);
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@ -458,6 +454,10 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
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// Load PL011's baud divisor registers
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// Load PL011's baud divisor registers
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r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd));
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r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd));
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r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
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r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
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// PL011 needs a (dummy) line control register write to latch in the
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// divisors. We don't want to actually change LCR contents here.
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r.uartlcr_h().modify(|_| {});
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}
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}
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}
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}
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}
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}
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