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Fix set_baudrate on RP-PICO

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This commit is contained in:
Thierry Fleury
2023-04-01 11:44:49 +02:00
parent e3efda2249
commit 0e13fe9925
1 changed files with 4 additions and 4 deletions
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8
embassy-rp/src/uart/mod.rs
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@@ -405,10 +405,6 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
Parity::ParityEven => (true, true), Parity::ParityEven => (true, true),
}; };
// PL011 needs a (dummy) line control register write to latch in the
// divisors. We don't want to actually change LCR contents here.
r.uartlcr_h().modify(|_| {});
r.uartlcr_h().write(|w| { r.uartlcr_h().write(|w| {
w.set_wlen(config.data_bits.bits()); w.set_wlen(config.data_bits.bits());
w.set_stp2(config.stop_bits == StopBits::STOP2); w.set_stp2(config.stop_bits == StopBits::STOP2);
@@ -458,6 +454,10 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
// Load PL011's baud divisor registers // Load PL011's baud divisor registers
r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd)); r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd));
r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd)); r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
// PL011 needs a (dummy) line control register write to latch in the
// divisors. We don't want to actually change LCR contents here.
r.uartlcr_h().modify(|_| {});
} }
} }
} }