From 0f5ba6d4a92b36f00a19116494017dda7ebfd9af Mon Sep 17 00:00:00 2001 From: Thales Fragoso Date: Sat, 15 May 2021 21:21:06 -0300 Subject: [PATCH] SDMMC: Implement Default for Config and add docs --- embassy-stm32/src/h7/mod.rs | 1 - embassy-stm32/src/h7/rcc.rs | 36 ----------------------------------- embassy-stm32/src/lib.rs | 7 ------- embassy-stm32/src/sdmmc_v2.rs | 19 ++++++++++++++++++ 4 files changed, 19 insertions(+), 44 deletions(-) delete mode 100644 embassy-stm32/src/h7/mod.rs delete mode 100644 embassy-stm32/src/h7/rcc.rs diff --git a/embassy-stm32/src/h7/mod.rs b/embassy-stm32/src/h7/mod.rs deleted file mode 100644 index 9dcd3d3e..00000000 --- a/embassy-stm32/src/h7/mod.rs +++ /dev/null @@ -1 +0,0 @@ -pub mod rcc; diff --git a/embassy-stm32/src/h7/rcc.rs b/embassy-stm32/src/h7/rcc.rs deleted file mode 100644 index 7affaf57..00000000 --- a/embassy-stm32/src/h7/rcc.rs +++ /dev/null @@ -1,36 +0,0 @@ -use crate::time::Hertz; - -/// Frozen core clock frequencies -#[derive(Clone, Copy)] -pub struct CoreClocks { - pub hclk: Hertz, - pub pclk1: Hertz, - pub pclk2: Hertz, - pub pclk3: Hertz, - pub pclk4: Hertz, - pub ppre1: u8, - pub ppre2: u8, - pub ppre3: u8, - pub ppre4: u8, - pub csi_ck: Option, - pub hsi_ck: Option, - pub hsi48_ck: Option, - pub lsi_ck: Option, - pub per_ck: Option, - pub hse_ck: Option, - pub mco1_ck: Option, - pub mco2_ck: Option, - pub pll1_p_ck: Option, - pub pll1_q_ck: Option, - pub pll1_r_ck: Option, - pub pll2_p_ck: Option, - pub pll2_q_ck: Option, - pub pll2_r_ck: Option, - pub pll3_p_ck: Option, - pub pll3_q_ck: Option, - pub pll3_r_ck: Option, - pub timx_ker_ck: Hertz, - pub timy_ker_ck: Hertz, - pub sys_ck: Hertz, - pub c_ck: Hertz, -} diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 97d41f10..29ea613f 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -28,13 +28,6 @@ pub mod sdmmc_v2; #[cfg(feature = "_sdmmc_v2")] pub use sdmmc_v2 as sdmmc; -pub mod time; - -#[cfg(feature = "stm32h750vb")] -mod h7; -#[cfg(feature = "stm32h750vb")] -pub use h7::rcc; - // This must go LAST so that it sees the `impl_foo!` macros mod pac; pub mod time; diff --git a/embassy-stm32/src/sdmmc_v2.rs b/embassy-stm32/src/sdmmc_v2.rs index 6a8539ca..465a20fc 100644 --- a/embassy-stm32/src/sdmmc_v2.rs +++ b/embassy-stm32/src/sdmmc_v2.rs @@ -1,3 +1,4 @@ +use core::default::Default; use core::future::Future; use core::marker::PhantomData; use core::task::Poll; @@ -135,6 +136,14 @@ fn clk_div(ker_ck: Hertz, sdmmc_ck: u32) -> Result<(u16, Hertz), Error> { } } +/// SDMMC configuration +/// +/// You should probably change the default clock values to match your configuration +/// +/// Default values: +/// hclk = 400_000_000 Hz +/// kernel_clk: 100_000_000 Hz +/// data_transfer_timeout: 5_000_000 #[non_exhaustive] pub struct Config { /// AHB clock @@ -145,6 +154,16 @@ pub struct Config { pub data_transfer_timeout: u32, } +impl Default for Config { + fn default() -> Self { + Self { + hclk: Hertz(400_000_000), + kernel_clk: Hertz(100_000_000), + data_transfer_timeout: 5_000_000, + } + } +} + /// Sdmmc device pub struct Sdmmc<'d, T: Instance, P: Pins> { sdmmc: PhantomData<&'d mut T>,