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stm32/bd: allow dead code

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This commit is contained in:
xoviat 2023-08-27 09:12:04 -05:00
parent 4caa8497fc
commit 10ea068027
1 changed files with 8 additions and 0 deletions
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8
embassy-stm32/src/rcc/bd.rs
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@ -1,5 +1,6 @@
#[derive(Copy, Clone, Debug, PartialEq)] #[derive(Copy, Clone, Debug, PartialEq)]
#[repr(u8)] #[repr(u8)]
#[allow(dead_code)]
pub enum RtcClockSource { pub enum RtcClockSource {
/// 00: No clock /// 00: No clock
NoClock = 0b00, NoClock = 0b00,
@ -11,12 +12,14 @@ pub enum RtcClockSource {
HSE = 0b11, HSE = 0b11,
} }
#[allow(dead_code)]
pub struct BackupDomain {} pub struct BackupDomain {}
impl BackupDomain { impl BackupDomain {
#[cfg(any( #[cfg(any(
rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
))] ))]
#[allow(dead_code)]
fn unlock_registers() { fn unlock_registers() {
#[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))] #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
let cr = crate::pac::PWR.cr(); let cr = crate::pac::PWR.cr();
@ -34,6 +37,7 @@ impl BackupDomain {
} }
#[cfg(any(rtc_v3, rtc_v3u5))] #[cfg(any(rtc_v3, rtc_v3u5))]
#[allow(dead_code)]
fn unlock_registers() { fn unlock_registers() {
// Unlock the backup domain // Unlock the backup domain
#[cfg(not(any(rtc_v3u5, rcc_wl5, rcc_wle)))] #[cfg(not(any(rtc_v3u5, rcc_wl5, rcc_wle)))]
@ -57,6 +61,7 @@ impl BackupDomain {
#[cfg(any( #[cfg(any(
rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
))] ))]
#[allow(dead_code)]
pub fn set_rtc_clock_source(clock_source: RtcClockSource) { pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
#[cfg(not(rtc_v2wb))] #[cfg(not(rtc_v2wb))]
use stm32_metapac::rcc::vals::Rtcsel; use stm32_metapac::rcc::vals::Rtcsel;
@ -78,6 +83,7 @@ impl BackupDomain {
} }
#[cfg(any(rtc_v3, rtc_v3u5))] #[cfg(any(rtc_v3, rtc_v3u5))]
#[allow(dead_code)]
pub fn set_rtc_clock_source(clock_source: RtcClockSource) { pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
let clock_source = clock_source as u8; let clock_source = clock_source as u8;
#[cfg(not(any(rcc_wl5, rcc_wle)))] #[cfg(not(any(rcc_wl5, rcc_wle)))]
@ -94,6 +100,7 @@ impl BackupDomain {
#[cfg(any( #[cfg(any(
rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
))] ))]
#[allow(dead_code)]
pub fn enable_rtc() { pub fn enable_rtc() {
#[cfg(not(any(rtc_v2l0, rtc_v2l1)))] #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
let reg = crate::pac::RCC.bdcr().read(); let reg = crate::pac::RCC.bdcr().read();
@ -137,6 +144,7 @@ impl BackupDomain {
} }
#[cfg(any(rtc_v3, rtc_v3u5))] #[cfg(any(rtc_v3, rtc_v3u5))]
#[allow(dead_code)]
pub fn enable_rtc() { pub fn enable_rtc() {
let bdcr = crate::pac::RCC.bdcr(); let bdcr = crate::pac::RCC.bdcr();