stm32/bd: allow dead code
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4caa8497fc
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10ea068027
@ -1,5 +1,6 @@
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#[derive(Copy, Clone, Debug, PartialEq)]
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#[repr(u8)]
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#[allow(dead_code)]
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pub enum RtcClockSource {
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/// 00: No clock
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NoClock = 0b00,
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@ -11,12 +12,14 @@ pub enum RtcClockSource {
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HSE = 0b11,
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}
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#[allow(dead_code)]
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pub struct BackupDomain {}
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impl BackupDomain {
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#[cfg(any(
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
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))]
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#[allow(dead_code)]
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fn unlock_registers() {
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#[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
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let cr = crate::pac::PWR.cr();
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@ -34,6 +37,7 @@ impl BackupDomain {
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}
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#[cfg(any(rtc_v3, rtc_v3u5))]
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#[allow(dead_code)]
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fn unlock_registers() {
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// Unlock the backup domain
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#[cfg(not(any(rtc_v3u5, rcc_wl5, rcc_wle)))]
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@ -57,6 +61,7 @@ impl BackupDomain {
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#[cfg(any(
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
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))]
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#[allow(dead_code)]
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pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
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#[cfg(not(rtc_v2wb))]
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use stm32_metapac::rcc::vals::Rtcsel;
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@ -78,6 +83,7 @@ impl BackupDomain {
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}
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#[cfg(any(rtc_v3, rtc_v3u5))]
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#[allow(dead_code)]
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pub fn set_rtc_clock_source(clock_source: RtcClockSource) {
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let clock_source = clock_source as u8;
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#[cfg(not(any(rcc_wl5, rcc_wle)))]
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@ -94,6 +100,7 @@ impl BackupDomain {
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#[cfg(any(
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
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))]
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#[allow(dead_code)]
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pub fn enable_rtc() {
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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let reg = crate::pac::RCC.bdcr().read();
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@ -137,6 +144,7 @@ impl BackupDomain {
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}
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#[cfg(any(rtc_v3, rtc_v3u5))]
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#[allow(dead_code)]
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pub fn enable_rtc() {
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let bdcr = crate::pac::RCC.bdcr();
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