More support for U5 PWR (ish), RCC, and FLASH (ish).
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@ -1,4 +1,3 @@
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use crate::pac::{PWR, RCC, SYSCFG};
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use crate::peripherals;
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use crate::peripherals;
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/// Voltage Scale
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/// Voltage Scale
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@ -1,7 +1,7 @@
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use crate::pac;
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use crate::pac;
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use crate::peripherals::{self, RCC};
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use crate::peripherals::{self, RCC};
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use crate::pwr::{Power, VoltageScale};
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use crate::pwr::{Power, VoltageScale};
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use crate::rcc::{get_freqs, set_freqs, Clocks};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::{Hertz, U32Ext};
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use crate::time::{Hertz, U32Ext};
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use stm32_metapac::rcc::vals::{Hpre, Msirange, Msirgsel, Pllm, Pllsrc, Ppre, Sw};
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use stm32_metapac::rcc::vals::{Hpre, Msirange, Msirgsel, Pllm, Pllsrc, Ppre, Sw};
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@ -108,12 +108,6 @@ pub enum PllM {
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Div16 = 0b1111,
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Div16 = 0b1111,
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}
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}
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impl PllM {
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fn to_div(&self) -> u32 {
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(*self as u32) + 1
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}
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}
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impl Into<Pllm> for PllM {
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impl Into<Pllm> for PllM {
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fn into(self) -> Pllm {
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fn into(self) -> Pllm {
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Pllm(self as u8)
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Pllm(self as u8)
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@ -490,7 +484,7 @@ impl RccExt for RCC {
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}
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}
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};
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};
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let (apb3_freq, apb3_tim_freq) = match cfgr.apb3_pre {
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let (apb3_freq, _apb3_tim_freq) = match cfgr.apb3_pre {
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APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
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APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
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pre => {
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pre => {
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let pre: u8 = pre.into();
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let pre: u8 = pre.into();
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