Merge #1313
1313: (embassy-stm32): rework bufferedUart to get rid of PeripheralMutex r=Dirbaio a=MathiasKoch New implementation is very similar to the implementation of embassy-nrf & embassy-rp. Also adds embedded-hal traits to bufferedUart. **NB**: Still needs testing on actual hardware Co-authored-by: Mathias <mk@blackbird.online>
This commit is contained in:
commit
143105eeb6
@ -1,55 +1,51 @@
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use core::cell::RefCell;
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use core::future::poll_fn;
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use core::future::poll_fn;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::slice;
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use core::task::Poll;
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use core::task::Poll;
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use embassy_cortex_m::peripheral::{PeripheralMutex, PeripheralState, StateStorage};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::ring_buffer::RingBuffer;
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use embassy_hal_common::atomic_ring_buffer::RingBuffer;
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use embassy_sync::waitqueue::WakerRegistration;
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use embassy_sync::waitqueue::AtomicWaker;
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use super::*;
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use super::*;
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pub struct State<'d, T: BasicInstance>(StateStorage<StateInner<'d, T>>);
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pub struct State {
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impl<'d, T: BasicInstance> State<'d, T> {
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rx_waker: AtomicWaker,
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rx_buf: RingBuffer,
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tx_waker: AtomicWaker,
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tx_buf: RingBuffer,
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}
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impl State {
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pub const fn new() -> Self {
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pub const fn new() -> Self {
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Self(StateStorage::new())
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Self {
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rx_buf: RingBuffer::new(),
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tx_buf: RingBuffer::new(),
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rx_waker: AtomicWaker::new(),
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tx_waker: AtomicWaker::new(),
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}
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}
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}
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}
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}
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struct StateInner<'d, T: BasicInstance> {
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phantom: PhantomData<&'d mut T>,
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rx_waker: WakerRegistration,
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rx: RingBuffer<'d>,
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tx_waker: WakerRegistration,
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tx: RingBuffer<'d>,
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}
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unsafe impl<'d, T: BasicInstance> Send for StateInner<'d, T> {}
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unsafe impl<'d, T: BasicInstance> Sync for StateInner<'d, T> {}
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pub struct BufferedUart<'d, T: BasicInstance> {
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pub struct BufferedUart<'d, T: BasicInstance> {
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inner: RefCell<PeripheralMutex<'d, StateInner<'d, T>>>,
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rx: BufferedUartRx<'d, T>,
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tx: BufferedUartTx<'d, T>,
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}
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}
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pub struct BufferedUartTx<'u, 'd, T: BasicInstance> {
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pub struct BufferedUartTx<'d, T: BasicInstance> {
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inner: &'u BufferedUart<'d, T>,
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phantom: PhantomData<&'d mut T>,
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}
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}
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pub struct BufferedUartRx<'u, 'd, T: BasicInstance> {
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pub struct BufferedUartRx<'d, T: BasicInstance> {
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inner: &'u BufferedUart<'d, T>,
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phantom: PhantomData<&'d mut T>,
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}
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}
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impl<'d, T: BasicInstance> Unpin for BufferedUart<'d, T> {}
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impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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pub fn new(
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pub fn new(
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state: &'d mut State<'d, T>,
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peri: impl Peripheral<P = T> + 'd,
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peri: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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tx_buffer: &'d mut [u8],
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tx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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config: Config,
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config: Config,
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@ -57,15 +53,14 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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T::enable();
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T::enable();
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T::reset();
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T::reset();
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Self::new_inner(state, peri, rx, tx, irq, tx_buffer, rx_buffer, config)
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Self::new_inner(peri, irq, rx, tx, tx_buffer, rx_buffer, config)
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}
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}
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pub fn new_with_rtscts(
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pub fn new_with_rtscts(
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state: &'d mut State<'d, T>,
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peri: impl Peripheral<P = T> + 'd,
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peri: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
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rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
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cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
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cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
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tx_buffer: &'d mut [u8],
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tx_buffer: &'d mut [u8],
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@ -86,16 +81,15 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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});
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});
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}
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}
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Self::new_inner(state, peri, rx, tx, irq, tx_buffer, rx_buffer, config)
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Self::new_inner(peri, irq, rx, tx, tx_buffer, rx_buffer, config)
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}
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}
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#[cfg(not(usart_v1))]
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#[cfg(not(usart_v1))]
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pub fn new_with_de(
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pub fn new_with_de(
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state: &'d mut State<'d, T>,
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peri: impl Peripheral<P = T> + 'd,
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peri: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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de: impl Peripheral<P = impl DePin<T>> + 'd,
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de: impl Peripheral<P = impl DePin<T>> + 'd,
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tx_buffer: &'d mut [u8],
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tx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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@ -113,23 +107,27 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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});
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});
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}
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}
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Self::new_inner(state, peri, rx, tx, irq, tx_buffer, rx_buffer, config)
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Self::new_inner(peri, irq, rx, tx, tx_buffer, rx_buffer, config)
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}
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}
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fn new_inner(
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fn new_inner(
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state: &'d mut State<'d, T>,
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_peri: impl Peripheral<P = T> + 'd,
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_peri: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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tx_buffer: &'d mut [u8],
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tx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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config: Config,
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config: Config,
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) -> BufferedUart<'d, T> {
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) -> BufferedUart<'d, T> {
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into_ref!(_peri, rx, tx, irq);
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into_ref!(_peri, rx, tx, irq);
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let r = T::regs();
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let state = T::buffered_state();
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let len = tx_buffer.len();
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unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) };
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let len = rx_buffer.len();
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unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) };
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let r = T::regs();
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unsafe {
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unsafe {
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rx.set_as_af(rx.af_num(), AFType::Input);
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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@ -147,273 +145,259 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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});
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});
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}
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}
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irq.set_handler(on_interrupt::<T>);
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irq.unpend();
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irq.enable();
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Self {
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Self {
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inner: RefCell::new(PeripheralMutex::new(irq, &mut state.0, move || StateInner {
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rx: BufferedUartRx { phantom: PhantomData },
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phantom: PhantomData,
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tx: BufferedUartTx { phantom: PhantomData },
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tx: RingBuffer::new(tx_buffer),
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tx_waker: WakerRegistration::new(),
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rx: RingBuffer::new(rx_buffer),
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rx_waker: WakerRegistration::new(),
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})),
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}
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}
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}
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}
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pub fn split<'u>(&'u mut self) -> (BufferedUartRx<'u, 'd, T>, BufferedUartTx<'u, 'd, T>) {
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pub fn split(self) -> (BufferedUartTx<'d, T>, BufferedUartRx<'d, T>) {
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(BufferedUartRx { inner: self }, BufferedUartTx { inner: self })
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(self.tx, self.rx)
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}
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}
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}
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async fn inner_read<'a>(&'a self, buf: &'a mut [u8]) -> Result<usize, Error> {
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impl<'d, T: BasicInstance> BufferedUartRx<'d, T> {
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async fn read(&self, buf: &mut [u8]) -> Result<usize, Error> {
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poll_fn(move |cx| {
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poll_fn(move |cx| {
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let mut do_pend = false;
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let state = T::buffered_state();
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let mut inner = self.inner.borrow_mut();
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let mut rx_reader = unsafe { state.rx_buf.reader() };
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let res = inner.with(|state| {
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let data = rx_reader.pop_slice();
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compiler_fence(Ordering::SeqCst);
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// We have data ready in buffer? Return it.
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if !data.is_empty() {
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let data = state.rx.pop_buf();
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let len = data.len().min(buf.len());
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if !data.is_empty() {
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buf[..len].copy_from_slice(&data[..len]);
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let len = data.len().min(buf.len());
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buf[..len].copy_from_slice(&data[..len]);
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if state.rx.is_full() {
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let do_pend = state.rx_buf.is_full();
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do_pend = true;
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rx_reader.pop_done(len);
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}
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state.rx.pop(len);
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return Poll::Ready(Ok(len));
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if do_pend {
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unsafe { T::Interrupt::steal().pend() };
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}
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}
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return Poll::Ready(Ok(len));
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}
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state.rx_waker.register(cx.waker());
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Poll::Pending
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})
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.await
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}
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fn blocking_read(&self, buf: &mut [u8]) -> Result<usize, Error> {
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loop {
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let state = T::buffered_state();
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let mut rx_reader = unsafe { state.rx_buf.reader() };
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let data = rx_reader.pop_slice();
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if !data.is_empty() {
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let len = data.len().min(buf.len());
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buf[..len].copy_from_slice(&data[..len]);
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let do_pend = state.rx_buf.is_full();
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rx_reader.pop_done(len);
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if do_pend {
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unsafe { T::Interrupt::steal().pend() };
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}
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return Ok(len);
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}
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}
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}
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async fn fill_buf(&self) -> Result<&[u8], Error> {
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poll_fn(move |cx| {
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let state = T::buffered_state();
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let mut rx_reader = unsafe { state.rx_buf.reader() };
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let (p, n) = rx_reader.pop_buf();
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if n == 0 {
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state.rx_waker.register(cx.waker());
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state.rx_waker.register(cx.waker());
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Poll::Pending
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return Poll::Pending;
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});
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if do_pend {
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inner.pend();
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}
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}
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res
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let buf = unsafe { slice::from_raw_parts(p, n) };
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Poll::Ready(Ok(buf))
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})
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})
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.await
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.await
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}
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}
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fn inner_blocking_read(&self, buf: &mut [u8]) -> Result<usize, Error> {
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fn consume(&self, amt: usize) {
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loop {
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let state = T::buffered_state();
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let mut do_pend = false;
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let mut rx_reader = unsafe { state.rx_buf.reader() };
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let mut inner = self.inner.borrow_mut();
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let full = state.rx_buf.is_full();
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let n = inner.with(|state| {
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rx_reader.pop_done(amt);
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compiler_fence(Ordering::SeqCst);
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if full {
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unsafe { T::Interrupt::steal().pend() };
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}
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}
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}
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// We have data ready in buffer? Return it.
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impl<'d, T: BasicInstance> BufferedUartTx<'d, T> {
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let data = state.rx.pop_buf();
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async fn write(&self, buf: &[u8]) -> Result<usize, Error> {
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if !data.is_empty() {
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poll_fn(move |cx| {
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let len = data.len().min(buf.len());
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let state = T::buffered_state();
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buf[..len].copy_from_slice(&data[..len]);
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let empty = state.tx_buf.is_empty();
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|
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if state.rx.is_full() {
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let mut tx_writer = unsafe { state.tx_buf.writer() };
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do_pend = true;
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let data = tx_writer.push_slice();
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}
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if data.is_empty() {
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state.rx.pop(len);
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state.tx_waker.register(cx.waker());
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return Poll::Pending;
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return len;
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}
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|
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0
|
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});
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||||||
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|
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if do_pend {
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inner.pend();
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|
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}
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}
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|
|
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if n > 0 {
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let n = data.len().min(buf.len());
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data[..n].copy_from_slice(&buf[..n]);
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tx_writer.push_done(n);
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|
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||||||
|
if empty {
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unsafe { T::Interrupt::steal() }.pend();
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||||||
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}
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||||||
|
|
||||||
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Poll::Ready(Ok(n))
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|
})
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|
.await
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|
}
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|
|
||||||
|
async fn flush(&self) -> Result<(), Error> {
|
||||||
|
poll_fn(move |cx| {
|
||||||
|
let state = T::buffered_state();
|
||||||
|
if !state.tx_buf.is_empty() {
|
||||||
|
state.tx_waker.register(cx.waker());
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||||||
|
return Poll::Pending;
|
||||||
|
}
|
||||||
|
|
||||||
|
Poll::Ready(Ok(()))
|
||||||
|
})
|
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|
.await
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||||||
|
}
|
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|
|
||||||
|
fn blocking_write(&self, buf: &[u8]) -> Result<usize, Error> {
|
||||||
|
loop {
|
||||||
|
let state = T::buffered_state();
|
||||||
|
let empty = state.tx_buf.is_empty();
|
||||||
|
|
||||||
|
let mut tx_writer = unsafe { state.tx_buf.writer() };
|
||||||
|
let data = tx_writer.push_slice();
|
||||||
|
if !data.is_empty() {
|
||||||
|
let n = data.len().min(buf.len());
|
||||||
|
data[..n].copy_from_slice(&buf[..n]);
|
||||||
|
tx_writer.push_done(n);
|
||||||
|
|
||||||
|
if empty {
|
||||||
|
unsafe { T::Interrupt::steal() }.pend();
|
||||||
|
}
|
||||||
|
|
||||||
return Ok(n);
|
return Ok(n);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
async fn inner_write<'a>(&'a self, buf: &'a [u8]) -> Result<usize, Error> {
|
fn blocking_flush(&self) -> Result<(), Error> {
|
||||||
poll_fn(move |cx| {
|
|
||||||
let mut inner = self.inner.borrow_mut();
|
|
||||||
let (poll, empty) = inner.with(|state| {
|
|
||||||
let empty = state.tx.is_empty();
|
|
||||||
let tx_buf = state.tx.push_buf();
|
|
||||||
if tx_buf.is_empty() {
|
|
||||||
state.tx_waker.register(cx.waker());
|
|
||||||
return (Poll::Pending, empty);
|
|
||||||
}
|
|
||||||
|
|
||||||
let n = core::cmp::min(tx_buf.len(), buf.len());
|
|
||||||
tx_buf[..n].copy_from_slice(&buf[..n]);
|
|
||||||
state.tx.push(n);
|
|
||||||
|
|
||||||
(Poll::Ready(Ok(n)), empty)
|
|
||||||
});
|
|
||||||
if empty {
|
|
||||||
inner.pend();
|
|
||||||
}
|
|
||||||
poll
|
|
||||||
})
|
|
||||||
.await
|
|
||||||
}
|
|
||||||
|
|
||||||
async fn inner_flush<'a>(&'a self) -> Result<(), Error> {
|
|
||||||
poll_fn(move |cx| {
|
|
||||||
self.inner.borrow_mut().with(|state| {
|
|
||||||
if !state.tx.is_empty() {
|
|
||||||
state.tx_waker.register(cx.waker());
|
|
||||||
return Poll::Pending;
|
|
||||||
}
|
|
||||||
|
|
||||||
Poll::Ready(Ok(()))
|
|
||||||
})
|
|
||||||
})
|
|
||||||
.await
|
|
||||||
}
|
|
||||||
|
|
||||||
fn inner_blocking_write(&self, buf: &[u8]) -> Result<usize, Error> {
|
|
||||||
loop {
|
loop {
|
||||||
let mut inner = self.inner.borrow_mut();
|
let state = T::buffered_state();
|
||||||
let (n, empty) = inner.with(|state| {
|
if state.tx_buf.is_empty() {
|
||||||
let empty = state.tx.is_empty();
|
|
||||||
let tx_buf = state.tx.push_buf();
|
|
||||||
if tx_buf.is_empty() {
|
|
||||||
return (0, empty);
|
|
||||||
}
|
|
||||||
|
|
||||||
let n = core::cmp::min(tx_buf.len(), buf.len());
|
|
||||||
tx_buf[..n].copy_from_slice(&buf[..n]);
|
|
||||||
state.tx.push(n);
|
|
||||||
|
|
||||||
(n, empty)
|
|
||||||
});
|
|
||||||
if empty {
|
|
||||||
inner.pend();
|
|
||||||
}
|
|
||||||
if n != 0 {
|
|
||||||
return Ok(n);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
fn inner_blocking_flush(&self) -> Result<(), Error> {
|
|
||||||
loop {
|
|
||||||
if !self.inner.borrow_mut().with(|state| state.tx.is_empty()) {
|
|
||||||
return Ok(());
|
return Ok(());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
async fn inner_fill_buf<'a>(&'a self) -> Result<&'a [u8], Error> {
|
|
||||||
poll_fn(move |cx| {
|
|
||||||
self.inner.borrow_mut().with(|state| {
|
|
||||||
compiler_fence(Ordering::SeqCst);
|
|
||||||
|
|
||||||
// We have data ready in buffer? Return it.
|
|
||||||
let buf = state.rx.pop_buf();
|
|
||||||
if !buf.is_empty() {
|
|
||||||
let buf: &[u8] = buf;
|
|
||||||
// Safety: buffer lives as long as uart
|
|
||||||
let buf: &[u8] = unsafe { core::mem::transmute(buf) };
|
|
||||||
return Poll::Ready(Ok(buf));
|
|
||||||
}
|
|
||||||
|
|
||||||
state.rx_waker.register(cx.waker());
|
|
||||||
Poll::<Result<&[u8], Error>>::Pending
|
|
||||||
})
|
|
||||||
})
|
|
||||||
.await
|
|
||||||
}
|
|
||||||
|
|
||||||
fn inner_consume(&self, amt: usize) {
|
|
||||||
let mut inner = self.inner.borrow_mut();
|
|
||||||
let signal = inner.with(|state| {
|
|
||||||
let full = state.rx.is_full();
|
|
||||||
state.rx.pop(amt);
|
|
||||||
full
|
|
||||||
});
|
|
||||||
if signal {
|
|
||||||
inner.pend();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, T: BasicInstance> StateInner<'d, T>
|
impl<'d, T: BasicInstance> Drop for BufferedUartRx<'d, T> {
|
||||||
where
|
fn drop(&mut self) {
|
||||||
Self: 'd,
|
let state = T::buffered_state();
|
||||||
{
|
|
||||||
fn on_rx(&mut self) {
|
|
||||||
let r = T::regs();
|
|
||||||
unsafe {
|
unsafe {
|
||||||
let sr = sr(r).read();
|
state.rx_buf.deinit();
|
||||||
clear_interrupt_flags(r, sr);
|
|
||||||
|
|
||||||
// This read also clears the error and idle interrupt flags on v1.
|
// TX is inactive if the the buffer is not available.
|
||||||
let b = rdr(r).read_volatile();
|
// We can now unregister the interrupt handler
|
||||||
|
if state.tx_buf.len() == 0 {
|
||||||
if sr.rxne() {
|
T::Interrupt::steal().disable();
|
||||||
if sr.pe() {
|
|
||||||
warn!("Parity error");
|
|
||||||
}
|
|
||||||
if sr.fe() {
|
|
||||||
warn!("Framing error");
|
|
||||||
}
|
|
||||||
if sr.ne() {
|
|
||||||
warn!("Noise error");
|
|
||||||
}
|
|
||||||
if sr.ore() {
|
|
||||||
warn!("Overrun error");
|
|
||||||
}
|
|
||||||
|
|
||||||
let buf = self.rx.push_buf();
|
|
||||||
if !buf.is_empty() {
|
|
||||||
buf[0] = b;
|
|
||||||
self.rx.push(1);
|
|
||||||
} else {
|
|
||||||
warn!("RX buffer full, discard received byte");
|
|
||||||
}
|
|
||||||
|
|
||||||
if self.rx.is_full() {
|
|
||||||
self.rx_waker.wake();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if sr.idle() {
|
|
||||||
self.rx_waker.wake();
|
|
||||||
};
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
fn on_tx(&mut self) {
|
|
||||||
let r = T::regs();
|
|
||||||
unsafe {
|
|
||||||
if sr(r).read().txe() {
|
|
||||||
let buf = self.tx.pop_buf();
|
|
||||||
if !buf.is_empty() {
|
|
||||||
r.cr1().modify(|w| {
|
|
||||||
w.set_txeie(true);
|
|
||||||
});
|
|
||||||
tdr(r).write_volatile(buf[0].into());
|
|
||||||
self.tx.pop(1);
|
|
||||||
self.tx_waker.wake();
|
|
||||||
} else {
|
|
||||||
// Disable interrupt until we have something to transmit again
|
|
||||||
r.cr1().modify(|w| {
|
|
||||||
w.set_txeie(false);
|
|
||||||
});
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, T: BasicInstance> PeripheralState for StateInner<'d, T>
|
impl<'d, T: BasicInstance> Drop for BufferedUartTx<'d, T> {
|
||||||
where
|
fn drop(&mut self) {
|
||||||
Self: 'd,
|
let state = T::buffered_state();
|
||||||
{
|
unsafe {
|
||||||
type Interrupt = T::Interrupt;
|
state.tx_buf.deinit();
|
||||||
fn on_interrupt(&mut self) {
|
|
||||||
self.on_rx();
|
// RX is inactive if the the buffer is not available.
|
||||||
self.on_tx();
|
// We can now unregister the interrupt handler
|
||||||
|
if state.rx_buf.len() == 0 {
|
||||||
|
T::Interrupt::steal().disable();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
unsafe fn on_interrupt<T: BasicInstance>(_: *mut ()) {
|
||||||
|
let r = T::regs();
|
||||||
|
let state = T::buffered_state();
|
||||||
|
|
||||||
|
// RX
|
||||||
|
unsafe {
|
||||||
|
let sr = sr(r).read();
|
||||||
|
clear_interrupt_flags(r, sr);
|
||||||
|
|
||||||
|
if sr.rxne() {
|
||||||
|
if sr.pe() {
|
||||||
|
warn!("Parity error");
|
||||||
|
}
|
||||||
|
if sr.fe() {
|
||||||
|
warn!("Framing error");
|
||||||
|
}
|
||||||
|
if sr.ne() {
|
||||||
|
warn!("Noise error");
|
||||||
|
}
|
||||||
|
if sr.ore() {
|
||||||
|
warn!("Overrun error");
|
||||||
|
}
|
||||||
|
|
||||||
|
let mut rx_writer = state.rx_buf.writer();
|
||||||
|
let buf = rx_writer.push_slice();
|
||||||
|
if !buf.is_empty() {
|
||||||
|
// This read also clears the error and idle interrupt flags on v1.
|
||||||
|
buf[0] = rdr(r).read_volatile();
|
||||||
|
rx_writer.push_done(1);
|
||||||
|
} else {
|
||||||
|
// FIXME: Should we disable any further RX interrupts when the buffer becomes full.
|
||||||
|
}
|
||||||
|
|
||||||
|
if state.rx_buf.is_full() {
|
||||||
|
state.rx_waker.wake();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if sr.idle() {
|
||||||
|
state.rx_waker.wake();
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
// TX
|
||||||
|
unsafe {
|
||||||
|
if sr(r).read().txe() {
|
||||||
|
let mut tx_reader = state.tx_buf.reader();
|
||||||
|
let buf = tx_reader.pop_slice();
|
||||||
|
if !buf.is_empty() {
|
||||||
|
r.cr1().modify(|w| {
|
||||||
|
w.set_txeie(true);
|
||||||
|
});
|
||||||
|
tdr(r).write_volatile(buf[0].into());
|
||||||
|
tx_reader.pop_done(1);
|
||||||
|
state.tx_waker.wake();
|
||||||
|
} else {
|
||||||
|
// Disable interrupt until we have something to transmit again
|
||||||
|
r.cr1().modify(|w| {
|
||||||
|
w.set_txeie(false);
|
||||||
|
});
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -427,94 +411,284 @@ impl<'d, T: BasicInstance> embedded_io::Io for BufferedUart<'d, T> {
|
|||||||
type Error = Error;
|
type Error = Error;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'u, 'd, T: BasicInstance> embedded_io::Io for BufferedUartRx<'u, 'd, T> {
|
impl<'d, T: BasicInstance> embedded_io::Io for BufferedUartRx<'d, T> {
|
||||||
type Error = Error;
|
type Error = Error;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'u, 'd, T: BasicInstance> embedded_io::Io for BufferedUartTx<'u, 'd, T> {
|
impl<'d, T: BasicInstance> embedded_io::Io for BufferedUartTx<'d, T> {
|
||||||
type Error = Error;
|
type Error = Error;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, T: BasicInstance> embedded_io::asynch::Read for BufferedUart<'d, T> {
|
impl<'d, T: BasicInstance> embedded_io::asynch::Read for BufferedUart<'d, T> {
|
||||||
async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner_read(buf).await
|
self.rx.read(buf).await
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'u, 'd, T: BasicInstance> embedded_io::asynch::Read for BufferedUartRx<'u, 'd, T> {
|
impl<'d, T: BasicInstance> embedded_io::asynch::Read for BufferedUartRx<'d, T> {
|
||||||
async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner.inner_read(buf).await
|
Self::read(self, buf).await
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, T: BasicInstance> embedded_io::asynch::BufRead for BufferedUart<'d, T> {
|
impl<'d, T: BasicInstance> embedded_io::asynch::BufRead for BufferedUart<'d, T> {
|
||||||
async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
|
async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
|
||||||
self.inner_fill_buf().await
|
self.rx.fill_buf().await
|
||||||
}
|
}
|
||||||
|
|
||||||
fn consume(&mut self, amt: usize) {
|
fn consume(&mut self, amt: usize) {
|
||||||
self.inner_consume(amt)
|
self.rx.consume(amt)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'u, 'd, T: BasicInstance> embedded_io::asynch::BufRead for BufferedUartRx<'u, 'd, T> {
|
impl<'d, T: BasicInstance> embedded_io::asynch::BufRead for BufferedUartRx<'d, T> {
|
||||||
async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
|
async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
|
||||||
self.inner.inner_fill_buf().await
|
Self::fill_buf(self).await
|
||||||
}
|
}
|
||||||
|
|
||||||
fn consume(&mut self, amt: usize) {
|
fn consume(&mut self, amt: usize) {
|
||||||
self.inner.inner_consume(amt)
|
Self::consume(self, amt)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, T: BasicInstance> embedded_io::asynch::Write for BufferedUart<'d, T> {
|
impl<'d, T: BasicInstance> embedded_io::asynch::Write for BufferedUart<'d, T> {
|
||||||
async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner_write(buf).await
|
self.tx.write(buf).await
|
||||||
}
|
}
|
||||||
|
|
||||||
async fn flush(&mut self) -> Result<(), Self::Error> {
|
async fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
self.inner_flush().await
|
self.tx.flush().await
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'u, 'd, T: BasicInstance> embedded_io::asynch::Write for BufferedUartTx<'u, 'd, T> {
|
impl<'d, T: BasicInstance> embedded_io::asynch::Write for BufferedUartTx<'d, T> {
|
||||||
async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner.inner_write(buf).await
|
Self::write(self, buf).await
|
||||||
}
|
}
|
||||||
|
|
||||||
async fn flush(&mut self) -> Result<(), Self::Error> {
|
async fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
self.inner.inner_flush().await
|
Self::flush(self).await
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, T: BasicInstance> embedded_io::blocking::Read for BufferedUart<'d, T> {
|
impl<'d, T: BasicInstance> embedded_io::blocking::Read for BufferedUart<'d, T> {
|
||||||
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner_blocking_read(buf)
|
self.rx.blocking_read(buf)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'u, 'd, T: BasicInstance> embedded_io::blocking::Read for BufferedUartRx<'u, 'd, T> {
|
impl<'d, T: BasicInstance> embedded_io::blocking::Read for BufferedUartRx<'d, T> {
|
||||||
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner.inner_blocking_read(buf)
|
self.blocking_read(buf)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, T: BasicInstance> embedded_io::blocking::Write for BufferedUart<'d, T> {
|
impl<'d, T: BasicInstance> embedded_io::blocking::Write for BufferedUart<'d, T> {
|
||||||
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner_blocking_write(buf)
|
self.tx.blocking_write(buf)
|
||||||
}
|
}
|
||||||
|
|
||||||
fn flush(&mut self) -> Result<(), Self::Error> {
|
fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
self.inner_blocking_flush()
|
self.tx.blocking_flush()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'u, 'd, T: BasicInstance> embedded_io::blocking::Write for BufferedUartTx<'u, 'd, T> {
|
impl<'d, T: BasicInstance> embedded_io::blocking::Write for BufferedUartTx<'d, T> {
|
||||||
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||||
self.inner.inner_blocking_write(buf)
|
Self::blocking_write(self, buf)
|
||||||
}
|
}
|
||||||
|
|
||||||
fn flush(&mut self) -> Result<(), Self::Error> {
|
fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
self.inner.inner_blocking_flush()
|
Self::blocking_flush(self)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
mod eh02 {
|
||||||
|
use super::*;
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_02::serial::Read<u8> for BufferedUartRx<'d, T> {
|
||||||
|
type Error = Error;
|
||||||
|
|
||||||
|
fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
|
||||||
|
let r = T::regs();
|
||||||
|
unsafe {
|
||||||
|
let sr = sr(r).read();
|
||||||
|
if sr.pe() {
|
||||||
|
rdr(r).read_volatile();
|
||||||
|
Err(nb::Error::Other(Error::Parity))
|
||||||
|
} else if sr.fe() {
|
||||||
|
rdr(r).read_volatile();
|
||||||
|
Err(nb::Error::Other(Error::Framing))
|
||||||
|
} else if sr.ne() {
|
||||||
|
rdr(r).read_volatile();
|
||||||
|
Err(nb::Error::Other(Error::Noise))
|
||||||
|
} else if sr.ore() {
|
||||||
|
rdr(r).read_volatile();
|
||||||
|
Err(nb::Error::Other(Error::Overrun))
|
||||||
|
} else if sr.rxne() {
|
||||||
|
Ok(rdr(r).read_volatile())
|
||||||
|
} else {
|
||||||
|
Err(nb::Error::WouldBlock)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_02::blocking::serial::Write<u8> for BufferedUartTx<'d, T> {
|
||||||
|
type Error = Error;
|
||||||
|
|
||||||
|
fn bwrite_all(&mut self, mut buffer: &[u8]) -> Result<(), Self::Error> {
|
||||||
|
while !buffer.is_empty() {
|
||||||
|
match self.blocking_write(buffer) {
|
||||||
|
Ok(0) => panic!("zero-length write."),
|
||||||
|
Ok(n) => buffer = &buffer[n..],
|
||||||
|
Err(e) => return Err(e),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
fn bflush(&mut self) -> Result<(), Self::Error> {
|
||||||
|
self.blocking_flush()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_02::serial::Read<u8> for BufferedUart<'d, T> {
|
||||||
|
type Error = Error;
|
||||||
|
|
||||||
|
fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
|
||||||
|
embedded_hal_02::serial::Read::read(&mut self.rx)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_02::blocking::serial::Write<u8> for BufferedUart<'d, T> {
|
||||||
|
type Error = Error;
|
||||||
|
|
||||||
|
fn bwrite_all(&mut self, mut buffer: &[u8]) -> Result<(), Self::Error> {
|
||||||
|
while !buffer.is_empty() {
|
||||||
|
match self.tx.blocking_write(buffer) {
|
||||||
|
Ok(0) => panic!("zero-length write."),
|
||||||
|
Ok(n) => buffer = &buffer[n..],
|
||||||
|
Err(e) => return Err(e),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
fn bflush(&mut self) -> Result<(), Self::Error> {
|
||||||
|
self.tx.blocking_flush()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(feature = "unstable-traits")]
|
||||||
|
mod eh1 {
|
||||||
|
use super::*;
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_1::serial::ErrorType for BufferedUart<'d, T> {
|
||||||
|
type Error = Error;
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_1::serial::ErrorType for BufferedUartTx<'d, T> {
|
||||||
|
type Error = Error;
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_1::serial::ErrorType for BufferedUartRx<'d, T> {
|
||||||
|
type Error = Error;
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_nb::serial::Read for BufferedUartRx<'d, T> {
|
||||||
|
fn read(&mut self) -> nb::Result<u8, Self::Error> {
|
||||||
|
embedded_hal_02::serial::Read::read(self)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_1::serial::Write for BufferedUartTx<'d, T> {
|
||||||
|
fn write(&mut self, buffer: &[u8]) -> Result<(), Self::Error> {
|
||||||
|
self.blocking_write(buffer).map(drop)
|
||||||
|
}
|
||||||
|
|
||||||
|
fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
|
self.blocking_flush()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_nb::serial::Write for BufferedUartTx<'d, T> {
|
||||||
|
fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> {
|
||||||
|
self.blocking_write(&[char]).map(drop).map_err(nb::Error::Other)
|
||||||
|
}
|
||||||
|
|
||||||
|
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||||
|
self.blocking_flush().map_err(nb::Error::Other)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_nb::serial::Read for BufferedUart<'d, T> {
|
||||||
|
fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
|
||||||
|
embedded_hal_02::serial::Read::read(&mut self.rx)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_1::serial::Write for BufferedUart<'d, T> {
|
||||||
|
fn write(&mut self, buffer: &[u8]) -> Result<(), Self::Error> {
|
||||||
|
self.tx.blocking_write(buffer).map(drop)
|
||||||
|
}
|
||||||
|
|
||||||
|
fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
|
self.tx.blocking_flush()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_nb::serial::Write for BufferedUart<'d, T> {
|
||||||
|
fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> {
|
||||||
|
self.tx.blocking_write(&[char]).map(drop).map_err(nb::Error::Other)
|
||||||
|
}
|
||||||
|
|
||||||
|
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||||
|
self.tx.blocking_flush().map_err(nb::Error::Other)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(all(
|
||||||
|
feature = "unstable-traits",
|
||||||
|
feature = "nightly",
|
||||||
|
feature = "_todo_embedded_hal_serial"
|
||||||
|
))]
|
||||||
|
mod eha {
|
||||||
|
use core::future::Future;
|
||||||
|
|
||||||
|
use super::*;
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_async::serial::Write for BufferedUartTx<'d, T> {
|
||||||
|
async fn write(&mut self, buf: &[u8]) -> Result<(), Self::Error> {
|
||||||
|
Self::write(buf)
|
||||||
|
}
|
||||||
|
|
||||||
|
async fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
|
Self::flush()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_async::serial::Read for BufferedUartRx<'d, T> {
|
||||||
|
async fn read(&mut self, buf: &mut [u8]) -> Result<(), Self::Error> {
|
||||||
|
Self::read(buf)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_async::serial::Write for BufferedUart<'d, T> {
|
||||||
|
async fn write(&mut self, buf: &[u8]) -> Result<(), Self::Error> {
|
||||||
|
self.tx.write(buf)
|
||||||
|
}
|
||||||
|
|
||||||
|
async fn flush(&mut self) -> Result<(), Self::Error> {
|
||||||
|
self.tx.flush()
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'d, T: BasicInstance> embedded_hal_async::serial::Read for BufferedUart<'d, T> {
|
||||||
|
async fn read(&mut self, buf: &mut [u8]) -> Result<(), Self::Error> {
|
||||||
|
self.rx.read(buf)
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -1112,6 +1112,9 @@ pub(crate) mod sealed {
|
|||||||
|
|
||||||
fn regs() -> Regs;
|
fn regs() -> Regs;
|
||||||
fn state() -> &'static State;
|
fn state() -> &'static State;
|
||||||
|
|
||||||
|
#[cfg(feature = "nightly")]
|
||||||
|
fn buffered_state() -> &'static buffered::State;
|
||||||
}
|
}
|
||||||
|
|
||||||
pub trait FullInstance: BasicInstance {
|
pub trait FullInstance: BasicInstance {
|
||||||
@ -1147,6 +1150,12 @@ macro_rules! impl_lpuart {
|
|||||||
static STATE: crate::usart::sealed::State = crate::usart::sealed::State::new();
|
static STATE: crate::usart::sealed::State = crate::usart::sealed::State::new();
|
||||||
&STATE
|
&STATE
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#[cfg(feature = "nightly")]
|
||||||
|
fn buffered_state() -> &'static buffered::State {
|
||||||
|
static STATE: buffered::State = buffered::State::new();
|
||||||
|
&STATE
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl BasicInstance for peripherals::$inst {}
|
impl BasicInstance for peripherals::$inst {}
|
||||||
|
@ -5,7 +5,7 @@
|
|||||||
use defmt::*;
|
use defmt::*;
|
||||||
use embassy_executor::Spawner;
|
use embassy_executor::Spawner;
|
||||||
use embassy_stm32::interrupt;
|
use embassy_stm32::interrupt;
|
||||||
use embassy_stm32::usart::{BufferedUart, Config, State};
|
use embassy_stm32::usart::{BufferedUart, Config};
|
||||||
use embedded_io::asynch::BufRead;
|
use embedded_io::asynch::BufRead;
|
||||||
use {defmt_rtt as _, panic_probe as _};
|
use {defmt_rtt as _, panic_probe as _};
|
||||||
|
|
||||||
@ -16,20 +16,10 @@ async fn main(_spawner: Spawner) {
|
|||||||
|
|
||||||
let config = Config::default();
|
let config = Config::default();
|
||||||
|
|
||||||
let mut state = State::new();
|
|
||||||
let irq = interrupt::take!(USART3);
|
let irq = interrupt::take!(USART3);
|
||||||
let mut tx_buf = [0u8; 32];
|
let mut tx_buf = [0u8; 32];
|
||||||
let mut rx_buf = [0u8; 32];
|
let mut rx_buf = [0u8; 32];
|
||||||
let mut buf_usart = BufferedUart::new(
|
let mut buf_usart = BufferedUart::new(p.USART3, irq, p.PD9, p.PD8, &mut tx_buf, &mut rx_buf, config);
|
||||||
&mut state,
|
|
||||||
p.USART3,
|
|
||||||
p.PD9,
|
|
||||||
p.PD8,
|
|
||||||
irq,
|
|
||||||
&mut tx_buf,
|
|
||||||
&mut rx_buf,
|
|
||||||
config,
|
|
||||||
);
|
|
||||||
|
|
||||||
loop {
|
loop {
|
||||||
let buf = buf_usart.fill_buf().await.unwrap();
|
let buf = buf_usart.fill_buf().await.unwrap();
|
||||||
|
@ -5,7 +5,7 @@
|
|||||||
use defmt::*;
|
use defmt::*;
|
||||||
use embassy_executor::Spawner;
|
use embassy_executor::Spawner;
|
||||||
use embassy_stm32::interrupt;
|
use embassy_stm32::interrupt;
|
||||||
use embassy_stm32::usart::{BufferedUart, Config, State};
|
use embassy_stm32::usart::{BufferedUart, Config};
|
||||||
use embedded_io::asynch::{Read, Write};
|
use embedded_io::asynch::{Read, Write};
|
||||||
use {defmt_rtt as _, panic_probe as _};
|
use {defmt_rtt as _, panic_probe as _};
|
||||||
|
|
||||||
@ -20,20 +20,8 @@ async fn main(_spawner: Spawner) {
|
|||||||
let mut config = Config::default();
|
let mut config = Config::default();
|
||||||
config.baudrate = 9600;
|
config.baudrate = 9600;
|
||||||
|
|
||||||
let mut state = State::new();
|
|
||||||
let irq = interrupt::take!(USART2);
|
let irq = interrupt::take!(USART2);
|
||||||
let mut usart = unsafe {
|
let mut usart = unsafe { BufferedUart::new(p.USART2, irq, p.PA3, p.PA2, &mut TX_BUFFER, &mut RX_BUFFER, config) };
|
||||||
BufferedUart::new(
|
|
||||||
&mut state,
|
|
||||||
p.USART2,
|
|
||||||
p.PA3,
|
|
||||||
p.PA2,
|
|
||||||
irq,
|
|
||||||
&mut TX_BUFFER,
|
|
||||||
&mut RX_BUFFER,
|
|
||||||
config,
|
|
||||||
)
|
|
||||||
};
|
|
||||||
|
|
||||||
usart.write_all(b"Hello Embassy World!\r\n").await.unwrap();
|
usart.write_all(b"Hello Embassy World!\r\n").await.unwrap();
|
||||||
info!("wrote Hello, starting echo");
|
info!("wrote Hello, starting echo");
|
||||||
|
Loading…
x
Reference in New Issue
Block a user