Fix warnings

embassy-nrf/src/gpio.rs

@@ -11,7 +11,6 @@ use gpio::pin_cnf::DRIVE_A;
 
 use crate::pac;
 use crate::pac::p0 as gpio;
-use crate::peripherals;
 
 /// A GPIO port with up to 32 pins.
 #[derive(Debug, Eq, PartialEq)]

embassy-nrf/src/pwm.rs

@@ -6,7 +6,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
 use embassy::util::Unborrow;
 use embassy_extras::unborrow;
 
-use crate::fmt::{assert, panic, unreachable, *};
+use crate::fmt::{unreachable, *};
 use crate::gpio::sealed::Pin as _;
 use crate::gpio::OptionalPin as GpioOptionalPin;
 use crate::interrupt::Interrupt;

embassy-nrf/src/qspi.rs

@@ -11,8 +11,7 @@ use futures::future::poll_fn;
 
 use crate::fmt::{assert, assert_eq, *};
 use crate::gpio::Pin as GpioPin;
-use crate::interrupt::{self};
-use crate::{pac, peripherals};
+use crate::pac;
 
 pub use crate::pac::qspi::ifconfig0::ADDRMODE_A as AddressMode;
 pub use crate::pac::qspi::ifconfig0::PPSIZE_A as WritePageSize;

embassy-nrf/src/spim.rs

@@ -13,8 +13,8 @@ use traits::spi::FullDuplex;
 
 use crate::gpio::sealed::Pin as _;
 use crate::gpio::{OptionalPin, Pin as GpioPin};
-use crate::interrupt::{self, Interrupt};
-use crate::{pac, peripherals, util::slice_in_ram_or};
+use crate::interrupt::Interrupt;
+use crate::{pac, util::slice_in_ram_or};
 
 pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
 pub use pac::spim0::frequency::FREQUENCY_A as Frequency;
@@ -285,7 +285,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spim<'d, T> {
 
     fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
         slice_in_ram_or(words, Error::DMABufferNotInDataMemory)?;
-        let mut recv: &mut [u8] = &mut [];
+        let recv: &mut [u8] = &mut [];
 
         // Conservative compiler fence to prevent optimizations that do not
         // take in to account actions by DMA. The fence has been placed here,

embassy-nrf/src/uarte.rs

@@ -16,10 +16,8 @@ use crate::chip::EASY_DMA_SIZE;
 use crate::fmt::{assert, panic, *};
 use crate::gpio::sealed::Pin as _;
 use crate::gpio::{OptionalPin as GpioOptionalPin, Pin as GpioPin};
-use crate::interrupt;
 use crate::interrupt::Interrupt;
 use crate::pac;
-use crate::peripherals;
 use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
 use crate::timer::Instance as TimerInstance;
 
@@ -43,7 +41,6 @@ impl Default for Config {
 
 /// Interface to the UARTE peripheral
 pub struct Uarte<'d, T: Instance> {
-    peri: T,
     phantom: PhantomData<&'d mut T>,
 }
 
@@ -58,7 +55,7 @@ impl<'d, T: Instance> Uarte<'d, T> {
     /// or [`receive`](Uarte::receive).
     #[allow(unused_unsafe)]
     pub unsafe fn new(
-        uarte: impl Unborrow<Target = T> + 'd,
+        _uarte: impl Unborrow<Target = T> + 'd,
         irq: impl Unborrow<Target = T::Interrupt> + 'd,
         rxd: impl Unborrow<Target = impl GpioPin> + 'd,
         txd: impl Unborrow<Target = impl GpioPin> + 'd,
@@ -66,7 +63,7 @@ impl<'d, T: Instance> Uarte<'d, T> {
         rts: impl Unborrow<Target = impl GpioOptionalPin> + 'd,
         config: Config,
     ) -> Self {
-        unborrow!(uarte, irq, rxd, txd, cts, rts);
+        unborrow!(irq, rxd, txd, cts, rts);
 
         let r = T::regs();
 
@@ -119,7 +116,6 @@ impl<'d, T: Instance> Uarte<'d, T> {
         r.enable.write(|w| w.enable().enabled());
 
         Self {
-            peri: uarte,
             phantom: PhantomData,
         }
     }