stm32: add exti
This commit is contained in:
Dario Nieuwenhuis
@ -1,89 +1,75 @@
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use core::convert::Infallible;
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use core::future::Future;
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use core::mem;
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use cortex_m;
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use core::marker::PhantomData;
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use core::pin::Pin;
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use core::task::{Context, Poll};
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use embassy::traits::gpio::{WaitForAnyEdge, WaitForFallingEdge, WaitForRisingEdge};
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use embassy::util::{AtomicWaker, Unborrow};
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use embassy_extras::impl_unborrow;
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use embedded_hal::digital::v2::InputPin;
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use futures::future::Select;
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use pac::exti::{regs, vals};
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use crate::hal::gpio;
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use crate::fmt::*;
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use crate::gpio::{AnyPin, Input, Pin as GpioPin};
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use crate::pac;
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use crate::peripherals;
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#[cfg(any(
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feature = "stm32f401",
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feature = "stm32f405",
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feature = "stm32f407",
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feature = "stm32f410",
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feature = "stm32f411",
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feature = "stm32f412",
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feature = "stm32f413",
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feature = "stm32f415",
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feature = "stm32f417",
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feature = "stm32f423",
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feature = "stm32f427",
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feature = "stm32f429",
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feature = "stm32f437",
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feature = "stm32f439",
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feature = "stm32f446",
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feature = "stm32f469",
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feature = "stm32f479",
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))]
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use crate::hal::syscfg::SysCfg;
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// TODO hardcoding peripheral addrs until we figure out how these are handled in the metapac
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const SYSCFG: pac::syscfg_f4::Syscfg = pac::syscfg_f4::Syscfg(0x40013800 as *mut _);
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const EXTI: pac::exti::Exti = pac::exti::Exti(0x40013c00 as *mut _);
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#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
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use crate::hal::syscfg::SYSCFG as SysCfg;
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const EXTI_COUNT: usize = 16;
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const NEW_AW: AtomicWaker = AtomicWaker::new();
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static EXTI_WAKERS: [AtomicWaker; EXTI_COUNT] = [NEW_AW; EXTI_COUNT];
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use embassy::traits::gpio::{
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WaitForAnyEdge, WaitForFallingEdge, WaitForHigh, WaitForLow, WaitForRisingEdge,
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};
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use embassy::util::InterruptFuture;
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// TODO for now delegate irq handling to user code until we figure out how interrupts work in the metapac
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pub unsafe fn on_irq() {
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let bits = EXTI.pr().read().0;
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use embedded_hal::digital::v2 as digital;
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// Mask all the channels that fired.
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EXTI.imr().modify(|w| w.0 &= !bits);
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use crate::interrupt;
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// Wake the tasks
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for pin in BitIter(bits) {
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EXTI_WAKERS[pin as usize].wake();
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}
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pub struct ExtiPin<T: Instance> {
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pin: T,
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interrupt: T::Interrupt,
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// Clear pending
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EXTI.pr().write_value(regs::Pr(bits));
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}
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impl<T: Instance> ExtiPin<T> {
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pub fn new(mut pin: T, interrupt: T::Interrupt, syscfg: &mut SysCfg) -> Self {
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cortex_m::interrupt::free(|_| {
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pin.make_source(syscfg);
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});
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struct BitIter(u32);
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Self { pin, interrupt }
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impl Iterator for BitIter {
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type Item = u32;
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fn next(&mut self) -> Option<Self::Item> {
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match self.0.trailing_zeros() {
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32 => None,
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b => {
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self.0 &= !(1 << b);
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Some(b)
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}
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}
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}
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}
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impl<T: Instance + digital::OutputPin> digital::OutputPin for ExtiPin<T> {
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type Error = T::Error;
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/// EXTI input driver
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pub struct ExtiInput<'d, T: GpioPin> {
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pin: Input<'d, T>,
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}
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fn set_low(&mut self) -> Result<(), Self::Error> {
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self.pin.set_low()
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}
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impl<'d, T: GpioPin> Unpin for ExtiInput<'d, T> {}
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fn set_high(&mut self) -> Result<(), Self::Error> {
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self.pin.set_high()
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impl<'d, T: GpioPin> ExtiInput<'d, T> {
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pub fn new(pin: Input<'d, T>, _ch: impl Unborrow<Target = T::ExtiChannel> + 'd) -> Self {
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Self { pin }
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}
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}
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impl<T: Instance + digital::StatefulOutputPin> digital::StatefulOutputPin for ExtiPin<T> {
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fn is_set_low(&self) -> Result<bool, Self::Error> {
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self.pin.is_set_low()
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}
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fn is_set_high(&self) -> Result<bool, Self::Error> {
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self.pin.is_set_high()
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}
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}
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impl<T: Instance + digital::ToggleableOutputPin> digital::ToggleableOutputPin for ExtiPin<T> {
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type Error = T::Error;
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fn toggle(&mut self) -> Result<(), Self::Error> {
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self.pin.toggle()
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}
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}
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impl<T: Instance + digital::InputPin> digital::InputPin for ExtiPin<T> {
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type Error = T::Error;
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impl<'d, T: GpioPin> InputPin for ExtiInput<'d, T> {
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.pin.is_high()
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@ -94,697 +80,139 @@ impl<T: Instance + digital::InputPin> digital::InputPin for ExtiPin<T> {
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}
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}
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impl<T: Instance + digital::InputPin + 'static> ExtiPin<T> {
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fn wait_for_state<'a>(&'a mut self, state: bool) -> impl Future<Output = ()> + 'a {
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async move {
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let fut = InterruptFuture::new(&mut self.interrupt);
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let pin = &mut self.pin;
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cortex_m::interrupt::free(|_| {
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pin.trigger_edge(if state {
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EdgeOption::Rising
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} else {
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EdgeOption::Falling
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});
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});
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if (state && self.pin.is_high().unwrap_or(false))
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|| (!state && self.pin.is_low().unwrap_or(false))
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{
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return;
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}
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fut.await;
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self.pin.clear_pending_bit();
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}
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}
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}
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impl<T: Instance + 'static> ExtiPin<T> {
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fn wait_for_edge<'a>(&'a mut self, state: EdgeOption) -> impl Future<Output = ()> + 'a {
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self.pin.clear_pending_bit();
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async move {
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let fut = InterruptFuture::new(&mut self.interrupt);
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let pin = &mut self.pin;
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cortex_m::interrupt::free(|_| {
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pin.trigger_edge(state);
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});
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fut.await;
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self.pin.clear_pending_bit();
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}
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}
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}
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impl<T: Instance + digital::InputPin + 'static> WaitForHigh for ExtiPin<T> {
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type Future<'a> = impl Future<Output = ()> + 'a;
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fn wait_for_high<'a>(&'a mut self) -> Self::Future<'a> {
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self.wait_for_state(true)
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}
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}
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impl<T: Instance + digital::InputPin + 'static> WaitForLow for ExtiPin<T> {
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type Future<'a> = impl Future<Output = ()> + 'a;
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fn wait_for_low<'a>(&'a mut self) -> Self::Future<'a> {
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self.wait_for_state(false)
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}
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}
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/*
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Irq Handler Description
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EXTI0_IRQn EXTI0_IRQHandler Handler for pins connected to line 0
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EXTI1_IRQn EXTI1_IRQHandler Handler for pins connected to line 1
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EXTI2_IRQn EXTI2_IRQHandler Handler for pins connected to line 2
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EXTI3_IRQn EXTI3_IRQHandler Handler for pins connected to line 3
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EXTI4_IRQn EXTI4_IRQHandler Handler for pins connected to line 4
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EXTI9_5_IRQn EXTI9_5_IRQHandler Handler for pins connected to line 5 to 9
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EXTI15_10_IRQn EXTI15_10_IRQHandler Handler for pins connected to line 10 to 15
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*/
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impl<T: Instance + 'static> WaitForRisingEdge for ExtiPin<T> {
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type Future<'a> = impl Future<Output = ()> + 'a;
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impl<'d, T: GpioPin> WaitForRisingEdge for ExtiInput<'d, T> {
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type Future<'a> = ExtiInputFuture<'a>;
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fn wait_for_rising_edge<'a>(&'a mut self) -> Self::Future<'a> {
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self.wait_for_edge(EdgeOption::Rising)
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ExtiInputFuture::new(
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self.pin.pin.pin(),
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self.pin.pin.port(),
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vals::Tr::ENABLED,
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vals::Tr::DISABLED,
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)
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}
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}
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impl<T: Instance + 'static> WaitForFallingEdge for ExtiPin<T> {
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type Future<'a> = impl Future<Output = ()> + 'a;
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impl<'d, T: GpioPin> WaitForFallingEdge for ExtiInput<'d, T> {
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type Future<'a> = ExtiInputFuture<'a>;
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fn wait_for_falling_edge<'a>(&'a mut self) -> Self::Future<'a> {
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self.wait_for_edge(EdgeOption::Falling)
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ExtiInputFuture::new(
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self.pin.pin.pin(),
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self.pin.pin.port(),
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vals::Tr::DISABLED,
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vals::Tr::ENABLED,
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)
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}
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}
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impl<T: Instance + 'static> WaitForAnyEdge for ExtiPin<T> {
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type Future<'a> = impl Future<Output = ()> + 'a;
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impl<'d, T: GpioPin> WaitForAnyEdge for ExtiInput<'d, T> {
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type Future<'a> = ExtiInputFuture<'a>;
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fn wait_for_any_edge<'a>(&'a mut self) -> Self::Future<'a> {
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self.wait_for_edge(EdgeOption::RisingFalling)
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ExtiInputFuture::new(
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self.pin.pin.pin(),
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self.pin.pin.port(),
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vals::Tr::ENABLED,
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vals::Tr::ENABLED,
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)
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}
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}
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mod private {
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pub trait Sealed {}
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pub struct ExtiInputFuture<'a> {
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pin: u8,
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phantom: PhantomData<&'a mut AnyPin>,
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}
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#[derive(Copy, Clone)]
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pub enum EdgeOption {
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Rising,
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Falling,
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RisingFalling,
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impl<'a> ExtiInputFuture<'a> {
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fn new(pin: u8, port: u8, rising: vals::Tr, falling: vals::Tr) -> Self {
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cortex_m::interrupt::free(|_| unsafe {
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let pin = pin as usize;
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SYSCFG.exticr(pin / 4).modify(|w| w.set_exti(pin % 4, port));
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EXTI.rtsr().modify(|w| w.set_tr(pin, rising));
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EXTI.ftsr().modify(|w| w.set_tr(pin, falling));
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EXTI.pr().write(|w| w.set_pr(pin, true)); // clear pending bit
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EXTI.imr().modify(|w| w.set_mr(pin, vals::Mr::UNMASKED));
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});
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Self {
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pin,
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phantom: PhantomData,
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}
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}
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}
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pub trait WithInterrupt: private::Sealed {
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type Interrupt: interrupt::Interrupt;
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impl<'a> Drop for ExtiInputFuture<'a> {
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fn drop(&mut self) {
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cortex_m::interrupt::free(|_| unsafe {
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let pin = self.pin as _;
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EXTI.imr().modify(|w| w.set_mr(pin, vals::Mr::MASKED));
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});
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}
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}
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pub trait Instance: WithInterrupt {
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fn make_source(&mut self, syscfg: &mut SysCfg);
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fn clear_pending_bit(&mut self);
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fn trigger_edge(&mut self, edge: EdgeOption);
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impl<'a> Future for ExtiInputFuture<'a> {
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type Output = ();
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fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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EXTI_WAKERS[self.pin as usize].register(cx.waker());
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if unsafe { EXTI.imr().read().mr(self.pin as _) == vals::Mr::MASKED } {
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Poll::Ready(())
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} else {
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Poll::Pending
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}
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}
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}
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macro_rules! exti {
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($set:ident, [
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$($INT:ident => $pin:ident,)+
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]) => {
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$(
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impl<T> private::Sealed for gpio::$set::$pin<T> {}
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impl<T> WithInterrupt for gpio::$set::$pin<T> {
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type Interrupt = interrupt::$INT;
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pub(crate) mod sealed {
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pub trait Channel {}
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}
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pub trait Channel: sealed::Channel + Sized {
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fn number(&self) -> usize;
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fn degrade(self) -> AnyChannel {
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AnyChannel {
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number: self.number() as u8,
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}
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}
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}
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pub struct AnyChannel {
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number: u8,
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}
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impl_unborrow!(AnyChannel);
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impl sealed::Channel for AnyChannel {}
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impl Channel for AnyChannel {
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fn number(&self) -> usize {
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self.number as usize
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}
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}
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macro_rules! impl_exti {
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($type:ident, $number:expr) => {
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impl sealed::Channel for peripherals::$type {}
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impl Channel for peripherals::$type {
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fn number(&self) -> usize {
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$number as usize
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}
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#[cfg(any(
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feature = "stm32f401",
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feature = "stm32f405",
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feature = "stm32f407",
|
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feature = "stm32f410",
|
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feature = "stm32f411",
|
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feature = "stm32f412",
|
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feature = "stm32f413",
|
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feature = "stm32f415",
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feature = "stm32f417",
|
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feature = "stm32f423",
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feature = "stm32f427",
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feature = "stm32f429",
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feature = "stm32f437",
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feature = "stm32f439",
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feature = "stm32f446",
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feature = "stm32f469",
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feature = "stm32f479",
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))]
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impl<T> Instance for gpio::$set::$pin<gpio::Input<T>> {
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fn make_source(&mut self, syscfg: &mut SysCfg) {
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use crate::hal::gpio::ExtiPin;
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self.make_interrupt_source(syscfg);
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}
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fn clear_pending_bit(&mut self) {
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use crate::hal::{gpio::Edge, gpio::ExtiPin, syscfg::SysCfg};
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self.clear_interrupt_pending_bit();
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}
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fn trigger_edge(&mut self, edge: EdgeOption) {
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use crate::hal::{gpio::Edge, gpio::ExtiPin, syscfg::SysCfg};
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use crate::pac::EXTI;
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let mut exti: EXTI = unsafe { mem::transmute(()) };
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let edge = match edge {
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EdgeOption::Falling => Edge::FALLING,
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EdgeOption::Rising => Edge::RISING,
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EdgeOption::RisingFalling => Edge::RISING_FALLING,
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};
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self.trigger_on_edge(&mut exti, edge);
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self.enable_interrupt(&mut exti);
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}
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}
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#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
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impl<T> Instance for gpio::$set::$pin<T> {
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fn make_source(&mut self, syscfg: &mut SysCfg) {}
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fn clear_pending_bit(&mut self) {
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use crate::hal::{
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exti::{Exti, ExtiLine, GpioLine, TriggerEdge},
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syscfg::SYSCFG,
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};
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Exti::unpend(GpioLine::from_raw_line(self.pin_number()).unwrap());
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}
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fn trigger_edge(&mut self, edge: EdgeOption) {
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use crate::hal::{
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exti::{Exti, ExtiLine, GpioLine, TriggerEdge},
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syscfg::SYSCFG,
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};
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use crate::pac::EXTI;
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let edge = match edge {
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EdgeOption::Falling => TriggerEdge::Falling,
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EdgeOption::Rising => TriggerEdge::Rising,
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EdgeOption::RisingFalling => TriggerEdge::Both,
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};
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let exti: EXTI = unsafe { mem::transmute(()) };
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let mut exti = Exti::new(exti);
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let port = self.port();
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let mut syscfg: SYSCFG = unsafe { mem::transmute(()) };
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let line = GpioLine::from_raw_line(self.pin_number()).unwrap();
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exti.listen_gpio(&mut syscfg, port, line, edge);
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}
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}
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)+
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}
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};
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}
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#[cfg(any(
|
||||
feature = "stm32f401",
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f410",
|
||||
feature = "stm32f411",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpioa, [
|
||||
EXTI0 => PA0,
|
||||
EXTI1 => PA1,
|
||||
EXTI2 => PA2,
|
||||
EXTI3 => PA3,
|
||||
EXTI4 => PA4,
|
||||
EXTI9_5 => PA5,
|
||||
EXTI9_5 => PA6,
|
||||
EXTI9_5 => PA7,
|
||||
EXTI9_5 => PA8,
|
||||
EXTI9_5 => PA9,
|
||||
EXTI15_10 => PA10,
|
||||
EXTI15_10 => PA11,
|
||||
EXTI15_10 => PA12,
|
||||
EXTI15_10 => PA13,
|
||||
EXTI15_10 => PA14,
|
||||
EXTI15_10 => PA15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f401",
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f410",
|
||||
feature = "stm32f411",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpiob, [
|
||||
EXTI0 => PB0,
|
||||
EXTI1 => PB1,
|
||||
EXTI2 => PB2,
|
||||
EXTI3 => PB3,
|
||||
EXTI4 => PB4,
|
||||
EXTI9_5 => PB5,
|
||||
EXTI9_5 => PB6,
|
||||
EXTI9_5 => PB7,
|
||||
EXTI9_5 => PB8,
|
||||
EXTI9_5 => PB9,
|
||||
EXTI15_10 => PB10,
|
||||
EXTI15_10 => PB11,
|
||||
EXTI15_10 => PB12,
|
||||
EXTI15_10 => PB13,
|
||||
EXTI15_10 => PB14,
|
||||
EXTI15_10 => PB15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f401",
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f410",
|
||||
feature = "stm32f411",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpioc, [
|
||||
EXTI0 => PC0,
|
||||
EXTI1 => PC1,
|
||||
EXTI2 => PC2,
|
||||
EXTI3 => PC3,
|
||||
EXTI4 => PC4,
|
||||
EXTI9_5 => PC5,
|
||||
EXTI9_5 => PC6,
|
||||
EXTI9_5 => PC7,
|
||||
EXTI9_5 => PC8,
|
||||
EXTI9_5 => PC9,
|
||||
EXTI15_10 => PC10,
|
||||
EXTI15_10 => PC11,
|
||||
EXTI15_10 => PC12,
|
||||
EXTI15_10 => PC13,
|
||||
EXTI15_10 => PC14,
|
||||
EXTI15_10 => PC15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f401",
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f411",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpiod, [
|
||||
EXTI0 => PD0,
|
||||
EXTI1 => PD1,
|
||||
EXTI2 => PD2,
|
||||
EXTI3 => PD3,
|
||||
EXTI4 => PD4,
|
||||
EXTI9_5 => PD5,
|
||||
EXTI9_5 => PD6,
|
||||
EXTI9_5 => PD7,
|
||||
EXTI9_5 => PD8,
|
||||
EXTI9_5 => PD9,
|
||||
EXTI15_10 => PD10,
|
||||
EXTI15_10 => PD11,
|
||||
EXTI15_10 => PD12,
|
||||
EXTI15_10 => PD13,
|
||||
EXTI15_10 => PD14,
|
||||
EXTI15_10 => PD15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f401",
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f411",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpioe, [
|
||||
EXTI0 => PE0,
|
||||
EXTI1 => PE1,
|
||||
EXTI2 => PE2,
|
||||
EXTI3 => PE3,
|
||||
EXTI4 => PE4,
|
||||
EXTI9_5 => PE5,
|
||||
EXTI9_5 => PE6,
|
||||
EXTI9_5 => PE7,
|
||||
EXTI9_5 => PE8,
|
||||
EXTI9_5 => PE9,
|
||||
EXTI15_10 => PE10,
|
||||
EXTI15_10 => PE11,
|
||||
EXTI15_10 => PE12,
|
||||
EXTI15_10 => PE13,
|
||||
EXTI15_10 => PE14,
|
||||
EXTI15_10 => PE15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpiof, [
|
||||
EXTI0 => PF0,
|
||||
EXTI1 => PF1,
|
||||
EXTI2 => PF2,
|
||||
EXTI3 => PF3,
|
||||
EXTI4 => PF4,
|
||||
EXTI9_5 => PF5,
|
||||
EXTI9_5 => PF6,
|
||||
EXTI9_5 => PF7,
|
||||
EXTI9_5 => PF8,
|
||||
EXTI9_5 => PF9,
|
||||
EXTI15_10 => PF10,
|
||||
EXTI15_10 => PF11,
|
||||
EXTI15_10 => PF12,
|
||||
EXTI15_10 => PF13,
|
||||
EXTI15_10 => PF14,
|
||||
EXTI15_10 => PF15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpiog, [
|
||||
EXTI0 => PG0,
|
||||
EXTI1 => PG1,
|
||||
EXTI2 => PG2,
|
||||
EXTI3 => PG3,
|
||||
EXTI4 => PG4,
|
||||
EXTI9_5 => PG5,
|
||||
EXTI9_5 => PG6,
|
||||
EXTI9_5 => PG7,
|
||||
EXTI9_5 => PG8,
|
||||
EXTI9_5 => PG9,
|
||||
EXTI15_10 => PG10,
|
||||
EXTI15_10 => PG11,
|
||||
EXTI15_10 => PG12,
|
||||
EXTI15_10 => PG13,
|
||||
EXTI15_10 => PG14,
|
||||
EXTI15_10 => PG15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f410",
|
||||
feature = "stm32f411",
|
||||
feature = "stm32f412",
|
||||
feature = "stm32f413",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f423",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f446",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpioh, [
|
||||
EXTI0 => PH0,
|
||||
EXTI1 => PH1,
|
||||
EXTI2 => PH2,
|
||||
EXTI3 => PH3,
|
||||
EXTI4 => PH4,
|
||||
EXTI9_5 => PH5,
|
||||
EXTI9_5 => PH6,
|
||||
EXTI9_5 => PH7,
|
||||
EXTI9_5 => PH8,
|
||||
EXTI9_5 => PH9,
|
||||
EXTI15_10 => PH10,
|
||||
EXTI15_10 => PH11,
|
||||
EXTI15_10 => PH12,
|
||||
EXTI15_10 => PH13,
|
||||
EXTI15_10 => PH14,
|
||||
EXTI15_10 => PH15,
|
||||
]);
|
||||
|
||||
#[cfg(any(feature = "stm32f401"))]
|
||||
exti!(gpioh, [
|
||||
EXTI0 => PH0,
|
||||
EXTI1 => PH1,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f405",
|
||||
feature = "stm32f407",
|
||||
feature = "stm32f415",
|
||||
feature = "stm32f417",
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpioi, [
|
||||
EXTI0 => PI0,
|
||||
EXTI1 => PI1,
|
||||
EXTI2 => PI2,
|
||||
EXTI3 => PI3,
|
||||
EXTI4 => PI4,
|
||||
EXTI9_5 => PI5,
|
||||
EXTI9_5 => PI6,
|
||||
EXTI9_5 => PI7,
|
||||
EXTI9_5 => PI8,
|
||||
EXTI9_5 => PI9,
|
||||
EXTI15_10 => PI10,
|
||||
EXTI15_10 => PI11,
|
||||
EXTI15_10 => PI12,
|
||||
EXTI15_10 => PI13,
|
||||
EXTI15_10 => PI14,
|
||||
EXTI15_10 => PI15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpioj, [
|
||||
EXTI0 => PJ0,
|
||||
EXTI1 => PJ1,
|
||||
EXTI2 => PJ2,
|
||||
EXTI3 => PJ3,
|
||||
EXTI4 => PJ4,
|
||||
EXTI9_5 => PJ5,
|
||||
EXTI9_5 => PJ6,
|
||||
EXTI9_5 => PJ7,
|
||||
EXTI9_5 => PJ8,
|
||||
EXTI9_5 => PJ9,
|
||||
EXTI15_10 => PJ10,
|
||||
EXTI15_10 => PJ11,
|
||||
EXTI15_10 => PJ12,
|
||||
EXTI15_10 => PJ13,
|
||||
EXTI15_10 => PJ14,
|
||||
EXTI15_10 => PJ15,
|
||||
]);
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f427",
|
||||
feature = "stm32f429",
|
||||
feature = "stm32f437",
|
||||
feature = "stm32f439",
|
||||
feature = "stm32f469",
|
||||
feature = "stm32f479"
|
||||
))]
|
||||
exti!(gpiok, [
|
||||
EXTI0 => PK0,
|
||||
EXTI1 => PK1,
|
||||
EXTI2 => PK2,
|
||||
EXTI3 => PK3,
|
||||
EXTI4 => PK4,
|
||||
EXTI9_5 => PK5,
|
||||
EXTI9_5 => PK6,
|
||||
EXTI9_5 => PK7,
|
||||
]);
|
||||
|
||||
#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
|
||||
exti!(gpioa, [
|
||||
EXTI0_1 => PA0,
|
||||
EXTI0_1 => PA1,
|
||||
EXTI2_3 => PA2,
|
||||
EXTI2_3 => PA3,
|
||||
EXTI4_15 => PA4,
|
||||
EXTI4_15 => PA5,
|
||||
EXTI4_15 => PA6,
|
||||
EXTI4_15 => PA7,
|
||||
EXTI4_15 => PA8,
|
||||
EXTI4_15 => PA9,
|
||||
EXTI4_15 => PA10,
|
||||
EXTI4_15 => PA11,
|
||||
EXTI4_15 => PA12,
|
||||
EXTI4_15 => PA13,
|
||||
EXTI4_15 => PA14,
|
||||
EXTI4_15 => PA15,
|
||||
]);
|
||||
|
||||
#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
|
||||
exti!(gpiob, [
|
||||
EXTI0_1 => PB0,
|
||||
EXTI0_1 => PB1,
|
||||
EXTI2_3 => PB2,
|
||||
EXTI2_3 => PB3,
|
||||
EXTI4_15 => PB4,
|
||||
EXTI4_15 => PB5,
|
||||
EXTI4_15 => PB6,
|
||||
EXTI4_15 => PB7,
|
||||
EXTI4_15 => PB8,
|
||||
EXTI4_15 => PB9,
|
||||
EXTI4_15 => PB10,
|
||||
EXTI4_15 => PB11,
|
||||
EXTI4_15 => PB12,
|
||||
EXTI4_15 => PB13,
|
||||
EXTI4_15 => PB14,
|
||||
EXTI4_15 => PB15,
|
||||
]);
|
||||
|
||||
#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
|
||||
exti!(gpioc, [
|
||||
EXTI0_1 => PC0,
|
||||
EXTI0_1 => PC1,
|
||||
EXTI2_3 => PC2,
|
||||
EXTI2_3 => PC3,
|
||||
EXTI4_15 => PC4,
|
||||
EXTI4_15 => PC5,
|
||||
EXTI4_15 => PC6,
|
||||
EXTI4_15 => PC7,
|
||||
EXTI4_15 => PC8,
|
||||
EXTI4_15 => PC9,
|
||||
EXTI4_15 => PC10,
|
||||
EXTI4_15 => PC11,
|
||||
EXTI4_15 => PC12,
|
||||
EXTI4_15 => PC13,
|
||||
EXTI4_15 => PC14,
|
||||
EXTI4_15 => PC15,
|
||||
]);
|
||||
|
||||
#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
|
||||
exti!(gpiod, [
|
||||
EXTI0_1 => PD0,
|
||||
EXTI0_1 => PD1,
|
||||
EXTI2_3 => PD2,
|
||||
EXTI2_3 => PD3,
|
||||
EXTI4_15 => PD4,
|
||||
EXTI4_15 => PD5,
|
||||
EXTI4_15 => PD6,
|
||||
EXTI4_15 => PD7,
|
||||
EXTI4_15 => PD8,
|
||||
EXTI4_15 => PD9,
|
||||
EXTI4_15 => PD10,
|
||||
EXTI4_15 => PD11,
|
||||
EXTI4_15 => PD12,
|
||||
EXTI4_15 => PD13,
|
||||
EXTI4_15 => PD14,
|
||||
EXTI4_15 => PD15,
|
||||
]);
|
||||
|
||||
#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
|
||||
exti!(gpioe, [
|
||||
EXTI0_1 => PE0,
|
||||
EXTI0_1 => PE1,
|
||||
EXTI2_3 => PE2,
|
||||
EXTI2_3 => PE3,
|
||||
EXTI4_15 => PE4,
|
||||
EXTI4_15 => PE5,
|
||||
EXTI4_15 => PE6,
|
||||
EXTI4_15 => PE7,
|
||||
EXTI4_15 => PE8,
|
||||
EXTI4_15 => PE9,
|
||||
EXTI4_15 => PE10,
|
||||
EXTI4_15 => PE11,
|
||||
EXTI4_15 => PE12,
|
||||
EXTI4_15 => PE13,
|
||||
EXTI4_15 => PE14,
|
||||
EXTI4_15 => PE15,
|
||||
]);
|
||||
|
||||
#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))]
|
||||
exti!(gpioh, [
|
||||
EXTI0_1 => PH0,
|
||||
EXTI0_1 => PH1,
|
||||
EXTI4_15 => PH9,
|
||||
EXTI4_15 => PH10,
|
||||
]);
|
||||
impl_exti!(EXTI0, 0);
|
||||
impl_exti!(EXTI1, 1);
|
||||
impl_exti!(EXTI2, 2);
|
||||
impl_exti!(EXTI3, 3);
|
||||
impl_exti!(EXTI4, 4);
|
||||
impl_exti!(EXTI5, 5);
|
||||
impl_exti!(EXTI6, 6);
|
||||
impl_exti!(EXTI7, 7);
|
||||
impl_exti!(EXTI8, 8);
|
||||
impl_exti!(EXTI9, 9);
|
||||
impl_exti!(EXTI10, 10);
|
||||
impl_exti!(EXTI11, 11);
|
||||
impl_exti!(EXTI12, 12);
|
||||
impl_exti!(EXTI13, 13);
|
||||
impl_exti!(EXTI14, 14);
|
||||
impl_exti!(EXTI15, 15);
|
||||
|
||||
Reference in New Issue
Block a user