From f9c62d4f1da1c4a38219056be3f658c34d0031af Mon Sep 17 00:00:00 2001
From: Mathias <mk@blackbird.online>
Date: Thu, 29 Sep 2022 09:09:35 +0200
Subject: [PATCH 1/2] Add flowcontrol to UART

---
 embassy-stm32/src/usart/mod.rs | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index 6c266874..22de6d18 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -214,7 +214,6 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
             tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
 
             r.cr2().write(|_w| {});
-            r.cr3().write(|_w| {});
             r.brr().write_value(regs::Brr(div));
             r.cr1().write(|w| {
                 w.set_ue(true);
@@ -241,6 +240,29 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
         }
     }
 
+    pub fn new_with_rtscts(
+        _inner: impl Peripheral<P = T> + 'd,
+        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
+        rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
+        cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
+        tx_dma: impl Peripheral<P = TxDma> + 'd,
+        rx_dma: impl Peripheral<P = RxDma> + 'd,
+        config: Config,
+    ) -> Self {
+        into_ref!(cts, rts);
+
+        unsafe {
+            rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
+            cts.set_as_af(cts.af_num(), AFType::Input);
+            T::regs().cr3().write(|w| {
+                w.set_rtse(true);
+                w.set_ctse(true);
+            });
+        }
+        Self::new(_inner, rx, tx, tx_dma, rx_dma, config)
+    }
+
     pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error>
     where
         TxDma: crate::usart::TxDma<T>,

From 66611a80caea216241d58cc3b848fe55b8865b49 Mon Sep 17 00:00:00 2001
From: Mathias <mk@blackbird.online>
Date: Wed, 26 Oct 2022 11:51:37 +0200
Subject: [PATCH 2/2] Introduce shared new_inner for uart instantiation

---
 embassy-stm32/src/usart/mod.rs | 63 +++++++++++++++++++++-------------
 1 file changed, 39 insertions(+), 24 deletions(-)

diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index 07406121..3f5b9952 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -222,10 +222,48 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
         rx_dma: impl Peripheral<P = RxDma> + 'd,
         config: Config,
     ) -> Self {
-        into_ref!(_inner, rx, tx, tx_dma, rx_dma);
+        T::enable();
+        T::reset();
+
+        Self::new_inner(_inner, rx, tx, tx_dma, rx_dma, config)
+    }
+
+    pub fn new_with_rtscts(
+        _inner: impl Peripheral<P = T> + 'd,
+        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
+        rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
+        cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
+        tx_dma: impl Peripheral<P = TxDma> + 'd,
+        rx_dma: impl Peripheral<P = RxDma> + 'd,
+        config: Config,
+    ) -> Self {
+        into_ref!(cts, rts);
 
         T::enable();
         T::reset();
+
+        unsafe {
+            rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
+            cts.set_as_af(cts.af_num(), AFType::Input);
+            T::regs().cr3().write(|w| {
+                w.set_rtse(true);
+                w.set_ctse(true);
+            });
+        }
+        Self::new_inner(_inner, rx, tx, tx_dma, rx_dma, config)
+    }
+
+    fn new_inner(
+        _inner: impl Peripheral<P = T> + 'd,
+        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
+        tx_dma: impl Peripheral<P = TxDma> + 'd,
+        rx_dma: impl Peripheral<P = RxDma> + 'd,
+        config: Config,
+    ) -> Self {
+        into_ref!(_inner, rx, tx, tx_dma, rx_dma);
+
         let pclk_freq = T::frequency();
 
         // TODO: better calculation, including error checking and OVER8 if possible.
@@ -264,29 +302,6 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
         }
     }
 
-    pub fn new_with_rtscts(
-        _inner: impl Peripheral<P = T> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
-        cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
-        tx_dma: impl Peripheral<P = TxDma> + 'd,
-        rx_dma: impl Peripheral<P = RxDma> + 'd,
-        config: Config,
-    ) -> Self {
-        into_ref!(cts, rts);
-
-        unsafe {
-            rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
-            cts.set_as_af(cts.af_num(), AFType::Input);
-            T::regs().cr3().write(|w| {
-                w.set_rtse(true);
-                w.set_ctse(true);
-            });
-        }
-        Self::new(_inner, rx, tx, tx_dma, rx_dma, config)
-    }
-
     pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error>
     where
         TxDma: crate::usart::TxDma<T>,