Merge #465

465: Adjust for STM32U5. r=lulf a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>

examples/stm32l4/.cargo/config.toml

@@ -1,7 +1,8 @@
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
 # replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
 #runner = "probe-run --chip STM32L475VGT6"
-runner = "probe-run --chip STM32L475VG"
+#runner = "probe-run --chip STM32L475VG"
+runner = "probe-run --chip STM32L4S5VI"
 
 rustflags = [
   # LLD (shipped with the Rust toolchain) is used as the default linker

examples/stm32u5/.cargo/config.toml

@@ -0,0 +1,18 @@
+[target.'cfg(all(target_arch = "arm", target_os = "none"))']
+# replace STM32F429ZITx with your chip as listed in `probe-run --list-chips`
+runner = "probe-run --chip STM32U585AIIx"
+
+rustflags = [
+  # LLD (shipped with the Rust toolchain) is used as the default linker
+  "-C", "link-arg=--nmagic",
+  "-C", "link-arg=-Tlink.x",
+  "-C", "link-arg=-Tdefmt.x",
+
+  # Code-size optimizations.
+  "-Z", "trap-unreachable=no",
+  "-C", "inline-threshold=5",
+  "-C", "no-vectorize-loops",
+]
+
+[build]
+target = "thumbv7em-none-eabi"

examples/stm32u5/Cargo.toml

@@ -0,0 +1,37 @@
+[package]
+authors = ["Dario Nieuwenhuis <dirbaio@dirbaio.net>"]
+edition = "2018"
+name = "embassy-stm32u5-examples"
+version = "0.1.0"
+resolver = "2"
+
+[features]
+default = [
+    "defmt-default",
+]
+defmt-default = []
+defmt-trace = []
+defmt-debug = []
+defmt-info = []
+defmt-warn = []
+defmt-error = []
+
+[dependencies]
+embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "defmt-trace"] }
+embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] }
+embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "unstable-pac", "stm32u585ai", "memory-x" ]  }
+embassy-hal-common = {version = "0.1.0", path = "../../embassy-hal-common" }
+
+defmt = "0.2.3"
+defmt-rtt = "0.2.0"
+
+cortex-m = "0.7.3"
+cortex-m-rt = "0.7.0"
+embedded-hal = "0.2.6"
+panic-probe = { version = "0.2.0", features = ["print-defmt"] }
+futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
+rtt-target = { version = "0.3.1", features = ["cortex-m"] }
+heapless = { version = "0.7.5", default-features = false }
+
+micromath = "2.0.0"
+

examples/stm32u5/src/bin/boot.rs

@@ -0,0 +1,16 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+#[path = "../example_common.rs"]
+mod example_common;
+use example_common::*;
+
+use embassy_stm32 as _;
+
+#[cortex_m_rt::entry]
+fn main() -> ! {
+    info!("Hello World!");
+
+    loop {}
+}

examples/stm32u5/src/example_common.rs

@@ -0,0 +1,17 @@
+#![macro_use]
+
+use defmt_rtt as _; // global logger
+use panic_probe as _;
+
+pub use defmt::*;
+
+use core::sync::atomic::{AtomicUsize, Ordering};
+
+defmt::timestamp! {"{=u64}", {
+        static COUNT: AtomicUsize = AtomicUsize::new(0);
+        // NOTE(no-CAS) `timestamps` runs with interrupts disabled
+        let n = COUNT.load(Ordering::Relaxed);
+        COUNT.store(n + 1, Ordering::Relaxed);
+        n as u64
+    }
+}