Switch to async-fn-in-trait
This commit is contained in:
@ -53,7 +53,7 @@ cortex-m = "0.7.6"
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critical-section = "1.1"
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futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
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chrono = { version = "0.4", default-features = false, optional = true }
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embedded-io = { version = "0.3.1", features = ["async"], optional = true }
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embedded-io = { version = "0.4.0", features = ["async"], optional = true }
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embedded-storage = { version = "0.3" }
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rp2040-pac2 = { git = "https://github.com/embassy-rs/rp2040-pac2", rev="017e3c9007b2d3b6965f0d85b5bf8ce3fa6d7364", features = ["rt"] }
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@ -61,5 +61,5 @@ rp2040-pac2 = { git = "https://github.com/embassy-rs/rp2040-pac2", rev="017e3c90
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embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
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embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9", optional = true}
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embedded-hal-async = { version = "=0.1.0-alpha.3", optional = true}
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embedded-hal-async = { version = "=0.2.0-alpha.0", optional = true}
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embedded-hal-nb = { version = "=1.0.0-alpha.1", optional = true}
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@ -870,9 +870,6 @@ mod eh02 {
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mod eh1 {
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use core::convert::Infallible;
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#[cfg(feature = "nightly")]
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use futures::FutureExt;
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use super::*;
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impl<'d, T: Pin> embedded_hal_1::digital::ErrorType for Input<'d, T> {
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@ -991,57 +988,57 @@ mod eh1 {
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#[cfg(feature = "nightly")]
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impl<'d, T: Pin> embedded_hal_async::digital::Wait for Flex<'d, T> {
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type WaitForHighFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_high<'a>(&'a mut self) -> Self::WaitForHighFuture<'a> {
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self.wait_for_high().map(Ok)
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async fn wait_for_high(&mut self) -> Result<(), Self::Error> {
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self.wait_for_high().await;
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Ok(())
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}
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type WaitForLowFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_low<'a>(&'a mut self) -> Self::WaitForLowFuture<'a> {
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self.wait_for_low().map(Ok)
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async fn wait_for_low(&mut self) -> Result<(), Self::Error> {
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self.wait_for_low().await;
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Ok(())
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}
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type WaitForRisingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_rising_edge<'a>(&'a mut self) -> Self::WaitForRisingEdgeFuture<'a> {
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self.wait_for_rising_edge().map(Ok)
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async fn wait_for_rising_edge(&mut self) -> Result<(), Self::Error> {
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self.wait_for_rising_edge().await;
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Ok(())
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}
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type WaitForFallingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_falling_edge<'a>(&'a mut self) -> Self::WaitForFallingEdgeFuture<'a> {
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self.wait_for_falling_edge().map(Ok)
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async fn wait_for_falling_edge(&mut self) -> Result<(), Self::Error> {
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self.wait_for_falling_edge().await;
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Ok(())
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}
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type WaitForAnyEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_any_edge<'a>(&'a mut self) -> Self::WaitForAnyEdgeFuture<'a> {
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self.wait_for_any_edge().map(Ok)
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async fn wait_for_any_edge(&mut self) -> Result<(), Self::Error> {
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self.wait_for_any_edge().await;
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Ok(())
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}
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}
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#[cfg(feature = "nightly")]
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impl<'d, T: Pin> embedded_hal_async::digital::Wait for Input<'d, T> {
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type WaitForHighFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_high<'a>(&'a mut self) -> Self::WaitForHighFuture<'a> {
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self.wait_for_high().map(Ok)
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async fn wait_for_high(&mut self) -> Result<(), Self::Error> {
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self.wait_for_high().await;
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Ok(())
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}
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type WaitForLowFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_low<'a>(&'a mut self) -> Self::WaitForLowFuture<'a> {
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self.wait_for_low().map(Ok)
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async fn wait_for_low(&mut self) -> Result<(), Self::Error> {
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self.wait_for_low().await;
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Ok(())
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}
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type WaitForRisingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_rising_edge<'a>(&'a mut self) -> Self::WaitForRisingEdgeFuture<'a> {
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self.wait_for_rising_edge().map(Ok)
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async fn wait_for_rising_edge(&mut self) -> Result<(), Self::Error> {
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self.wait_for_rising_edge().await;
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Ok(())
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}
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type WaitForFallingEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_falling_edge<'a>(&'a mut self) -> Self::WaitForFallingEdgeFuture<'a> {
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self.wait_for_falling_edge().map(Ok)
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async fn wait_for_falling_edge(&mut self) -> Result<(), Self::Error> {
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self.wait_for_falling_edge().await;
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Ok(())
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}
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type WaitForAnyEdgeFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn wait_for_any_edge<'a>(&'a mut self) -> Self::WaitForAnyEdgeFuture<'a> {
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self.wait_for_any_edge().map(Ok)
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async fn wait_for_any_edge(&mut self) -> Result<(), Self::Error> {
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self.wait_for_any_edge().await;
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Ok(())
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}
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}
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}
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@ -717,8 +717,6 @@ mod eh1 {
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}
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#[cfg(all(feature = "unstable-traits", feature = "nightly"))]
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mod nightly {
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use core::future::Future;
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use embedded_hal_1::i2c::Operation;
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use embedded_hal_async::i2c::AddressMode;
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@ -729,74 +727,55 @@ mod nightly {
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A: AddressMode + Into<u16> + 'static,
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T: Instance + 'd,
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{
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type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a
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where Self: 'a;
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type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a
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where Self: 'a;
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type WriteReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a
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where Self: 'a;
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type TransactionFuture<'a, 'b> = impl Future<Output = Result<(), Error>> + 'a
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where Self: 'a, 'b: 'a;
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fn read<'a>(&'a mut self, address: A, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async fn read<'a>(&'a mut self, address: A, read: &'a mut [u8]) -> Result<(), Self::Error> {
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let addr: u16 = address.into();
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async move {
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Self::setup(addr)?;
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self.read_async_internal(buffer, false, true).await
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}
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Self::setup(addr)?;
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self.read_async_internal(read, false, true).await
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}
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fn write<'a>(&'a mut self, address: A, write: &'a [u8]) -> Self::WriteFuture<'a> {
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async fn write<'a>(&'a mut self, address: A, write: &'a [u8]) -> Result<(), Self::Error> {
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let addr: u16 = address.into();
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async move {
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Self::setup(addr)?;
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self.write_async_internal(write.iter().copied(), true).await
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}
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Self::setup(addr)?;
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self.write_async_internal(write.iter().copied(), true).await
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}
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fn write_read<'a>(
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async fn write_read<'a>(
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&'a mut self,
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address: A,
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bytes: &'a [u8],
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buffer: &'a mut [u8],
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) -> Self::WriteReadFuture<'a> {
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write: &'a [u8],
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read: &'a mut [u8],
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) -> Result<(), Self::Error> {
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let addr: u16 = address.into();
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async move {
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Self::setup(addr)?;
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self.write_async_internal(bytes.iter().cloned(), false).await?;
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self.read_async_internal(buffer, false, true).await
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}
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Self::setup(addr)?;
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self.write_async_internal(write.iter().cloned(), false).await?;
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self.read_async_internal(read, false, true).await
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}
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fn transaction<'a, 'b>(
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async fn transaction<'a, 'b>(
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&'a mut self,
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address: A,
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operations: &'a mut [Operation<'b>],
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) -> Self::TransactionFuture<'a, 'b> {
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) -> Result<(), Self::Error> {
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let addr: u16 = address.into();
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async move {
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let mut iterator = operations.iter_mut();
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let mut iterator = operations.iter_mut();
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while let Some(op) = iterator.next() {
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let last = iterator.len() == 0;
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while let Some(op) = iterator.next() {
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let last = iterator.len() == 0;
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match op {
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Operation::Read(buffer) => {
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Self::setup(addr)?;
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self.read_async_internal(buffer, false, last).await?;
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}
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Operation::Write(buffer) => {
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Self::setup(addr)?;
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self.write_async_internal(buffer.into_iter().cloned(), last).await?;
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}
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match op {
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Operation::Read(buffer) => {
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Self::setup(addr)?;
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self.read_async_internal(buffer, false, last).await?;
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}
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Operation::Write(buffer) => {
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Self::setup(addr)?;
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self.write_async_internal(buffer.into_iter().cloned(), last).await?;
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}
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}
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Ok(())
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}
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Ok(())
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}
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}
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}
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@ -1,5 +1,6 @@
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#![no_std]
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#![cfg_attr(feature = "nightly", feature(type_alias_impl_trait))]
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#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
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#![cfg_attr(feature = "nightly", allow(incomplete_features))]
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// This mod MUST go first, so that the others see its macros.
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pub(crate) mod fmt;
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@ -554,45 +554,33 @@ mod eh1 {
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#[cfg(all(feature = "unstable-traits", feature = "nightly"))]
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mod eha {
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use core::future::Future;
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use super::*;
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impl<'d, T: Instance> embedded_hal_async::spi::SpiBusFlush for Spi<'d, T, Async> {
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type FlushFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> {
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async { Ok(()) }
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async fn flush(&mut self) -> Result<(), Self::Error> {
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Ok(())
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}
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}
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impl<'d, T: Instance> embedded_hal_async::spi::SpiBusWrite<u8> for Spi<'d, T, Async> {
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type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> {
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self.write(data)
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async fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
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self.write(words).await
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}
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}
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impl<'d, T: Instance> embedded_hal_async::spi::SpiBusRead<u8> for Spi<'d, T, Async> {
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type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> {
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self.read(data)
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async fn read(&mut self, words: &mut [u8]) -> Result<(), Self::Error> {
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self.read(words).await
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}
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}
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impl<'d, T: Instance> embedded_hal_async::spi::SpiBus<u8> for Spi<'d, T, Async> {
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type TransferFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn transfer<'a>(&'a mut self, rx: &'a mut [u8], tx: &'a [u8]) -> Self::TransferFuture<'a> {
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self.transfer(rx, tx)
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async fn transfer<'a>(&'a mut self, read: &'a mut [u8], write: &'a [u8]) -> Result<(), Self::Error> {
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self.transfer(read, write).await
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}
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type TransferInPlaceFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn transfer_in_place<'a>(&'a mut self, words: &'a mut [u8]) -> Self::TransferInPlaceFuture<'a> {
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self.transfer_in_place(words)
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async fn transfer_in_place<'a>(&'a mut self, words: &'a mut [u8]) -> Result<(), Self::Error> {
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self.transfer_in_place(words).await
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}
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}
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}
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|
@ -1,4 +1,4 @@
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use core::future::{poll_fn, Future};
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use core::future::poll_fn;
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use core::task::{Poll, Waker};
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use atomic_polyfill::{compiler_fence, Ordering};
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@ -355,11 +355,7 @@ impl<'d, T: Instance> embedded_io::Io for BufferedUartTx<'d, T> {
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}
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impl<'d, T: Instance + 'd> embedded_io::asynch::Read for BufferedUart<'d, T> {
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type ReadFuture<'a> = impl Future<Output = Result<usize, Self::Error>> + 'a
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where
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Self: 'a;
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fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
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poll_fn(move |cx| {
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let (res, do_pend) = self.inner.with(|state| {
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compiler_fence(Ordering::SeqCst);
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@ -372,15 +368,12 @@ impl<'d, T: Instance + 'd> embedded_io::asynch::Read for BufferedUart<'d, T> {
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res
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})
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.await
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}
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}
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impl<'d, T: Instance + 'd> embedded_io::asynch::Read for BufferedUartRx<'d, T> {
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type ReadFuture<'a> = impl Future<Output = Result<usize, Self::Error>> + 'a
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where
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Self: 'a;
|
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|
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fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
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poll_fn(move |cx| {
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let (res, do_pend) = self.inner.with(|state| {
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compiler_fence(Ordering::SeqCst);
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@ -393,21 +386,19 @@ impl<'d, T: Instance + 'd> embedded_io::asynch::Read for BufferedUartRx<'d, T> {
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res
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})
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.await
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||||
}
|
||||
}
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|
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impl<'d, T: Instance + 'd> embedded_io::asynch::BufRead for BufferedUart<'d, T> {
|
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type FillBufFuture<'a> = impl Future<Output = Result<&'a [u8], Self::Error>> + 'a
|
||||
where
|
||||
Self: 'a;
|
||||
|
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fn fill_buf<'a>(&'a mut self) -> Self::FillBufFuture<'a> {
|
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async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
|
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poll_fn(move |cx| {
|
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self.inner.with(|state| {
|
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compiler_fence(Ordering::SeqCst);
|
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state.rx.fill_buf(cx.waker())
|
||||
})
|
||||
})
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.await
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||||
}
|
||||
|
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fn consume(&mut self, amt: usize) {
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@ -419,17 +410,14 @@ impl<'d, T: Instance + 'd> embedded_io::asynch::BufRead for BufferedUart<'d, T>
|
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}
|
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|
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impl<'d, T: Instance + 'd> embedded_io::asynch::BufRead for BufferedUartRx<'d, T> {
|
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type FillBufFuture<'a> = impl Future<Output = Result<&'a [u8], Self::Error>> + 'a
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
fn fill_buf<'a>(&'a mut self) -> Self::FillBufFuture<'a> {
|
||||
async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
|
||||
poll_fn(move |cx| {
|
||||
self.inner.with(|state| {
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
state.fill_buf(cx.waker())
|
||||
})
|
||||
})
|
||||
.await
|
||||
}
|
||||
|
||||
fn consume(&mut self, amt: usize) {
|
||||
@ -441,11 +429,7 @@ impl<'d, T: Instance + 'd> embedded_io::asynch::BufRead for BufferedUartRx<'d, T
|
||||
}
|
||||
|
||||
impl<'d, T: Instance + 'd> embedded_io::asynch::Write for BufferedUart<'d, T> {
|
||||
type WriteFuture<'a> = impl Future<Output = Result<usize, Self::Error>> + 'a
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> {
|
||||
async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||
poll_fn(move |cx| {
|
||||
let (poll, empty) = self.inner.with(|state| state.tx.write(buf, cx.waker()));
|
||||
if empty {
|
||||
@ -453,23 +437,16 @@ impl<'d, T: Instance + 'd> embedded_io::asynch::Write for BufferedUart<'d, T> {
|
||||
}
|
||||
poll
|
||||
})
|
||||
.await
|
||||
}
|
||||
|
||||
type FlushFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> {
|
||||
poll_fn(move |cx| self.inner.with(|state| state.tx.flush(cx.waker())))
|
||||
async fn flush(&mut self) -> Result<(), Self::Error> {
|
||||
poll_fn(move |cx| self.inner.with(|state| state.tx.flush(cx.waker()))).await
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, T: Instance + 'd> embedded_io::asynch::Write for BufferedUartTx<'d, T> {
|
||||
type WriteFuture<'a> = impl Future<Output = Result<usize, Self::Error>> + 'a
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> {
|
||||
async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||
poll_fn(move |cx| {
|
||||
let (poll, empty) = self.inner.with(|state| state.write(buf, cx.waker()));
|
||||
if empty {
|
||||
@ -477,13 +454,10 @@ impl<'d, T: Instance + 'd> embedded_io::asynch::Write for BufferedUartTx<'d, T>
|
||||
}
|
||||
poll
|
||||
})
|
||||
.await
|
||||
}
|
||||
|
||||
type FlushFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> {
|
||||
poll_fn(move |cx| self.inner.with(|state| state.flush(cx.waker())))
|
||||
async fn flush(&mut self) -> Result<(), Self::Error> {
|
||||
poll_fn(move |cx| self.inner.with(|state| state.flush(cx.waker()))).await
|
||||
}
|
||||
}
|
||||
|
@ -1,4 +1,4 @@
|
||||
use core::future::{poll_fn, Future};
|
||||
use core::future::poll_fn;
|
||||
use core::marker::PhantomData;
|
||||
use core::slice;
|
||||
use core::sync::atomic::Ordering;
|
||||
@ -352,9 +352,7 @@ pub struct Bus<'d, T: Instance> {
|
||||
}
|
||||
|
||||
impl<'d, T: Instance> driver::Bus for Bus<'d, T> {
|
||||
type PollFuture<'a> = impl Future<Output = Event> + 'a where Self: 'a;
|
||||
|
||||
fn poll<'a>(&'a mut self) -> Self::PollFuture<'a> {
|
||||
async fn poll(&mut self) -> Event {
|
||||
poll_fn(move |cx| unsafe {
|
||||
BUS_WAKER.register(cx.waker());
|
||||
|
||||
@ -406,6 +404,7 @@ impl<'d, T: Instance> driver::Bus for Bus<'d, T> {
|
||||
});
|
||||
Poll::Pending
|
||||
})
|
||||
.await
|
||||
}
|
||||
|
||||
#[inline]
|
||||
@ -456,22 +455,12 @@ impl<'d, T: Instance> driver::Bus for Bus<'d, T> {
|
||||
}
|
||||
}
|
||||
|
||||
type EnableFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
|
||||
async fn enable(&mut self) {}
|
||||
|
||||
fn enable(&mut self) -> Self::EnableFuture<'_> {
|
||||
async move {}
|
||||
}
|
||||
async fn disable(&mut self) {}
|
||||
|
||||
type DisableFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
|
||||
|
||||
fn disable(&mut self) -> Self::DisableFuture<'_> {
|
||||
async move {}
|
||||
}
|
||||
|
||||
type RemoteWakeupFuture<'a> = impl Future<Output = Result<(), Unsupported>> + 'a where Self: 'a;
|
||||
|
||||
fn remote_wakeup(&mut self) -> Self::RemoteWakeupFuture<'_> {
|
||||
async move { Err(Unsupported) }
|
||||
async fn remote_wakeup(&mut self) -> Result<(), Unsupported> {
|
||||
Err(Unsupported)
|
||||
}
|
||||
}
|
||||
|
||||
@ -515,24 +504,20 @@ impl<'d, T: Instance> driver::Endpoint for Endpoint<'d, T, In> {
|
||||
&self.info
|
||||
}
|
||||
|
||||
type WaitEnabledFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
|
||||
|
||||
fn wait_enabled(&mut self) -> Self::WaitEnabledFuture<'_> {
|
||||
async move {
|
||||
trace!("wait_enabled IN WAITING");
|
||||
let index = self.info.addr.index();
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[index].register(cx.waker());
|
||||
let val = unsafe { T::dpram().ep_in_control(self.info.addr.index() - 1).read() };
|
||||
if val.enable() {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
trace!("wait_enabled IN OK");
|
||||
}
|
||||
async fn wait_enabled(&mut self) {
|
||||
trace!("wait_enabled IN WAITING");
|
||||
let index = self.info.addr.index();
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[index].register(cx.waker());
|
||||
let val = unsafe { T::dpram().ep_in_control(self.info.addr.index() - 1).read() };
|
||||
if val.enable() {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
trace!("wait_enabled IN OK");
|
||||
}
|
||||
}
|
||||
|
||||
@ -541,117 +526,105 @@ impl<'d, T: Instance> driver::Endpoint for Endpoint<'d, T, Out> {
|
||||
&self.info
|
||||
}
|
||||
|
||||
type WaitEnabledFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
|
||||
|
||||
fn wait_enabled(&mut self) -> Self::WaitEnabledFuture<'_> {
|
||||
async move {
|
||||
trace!("wait_enabled OUT WAITING");
|
||||
let index = self.info.addr.index();
|
||||
poll_fn(|cx| {
|
||||
EP_OUT_WAKERS[index].register(cx.waker());
|
||||
let val = unsafe { T::dpram().ep_out_control(self.info.addr.index() - 1).read() };
|
||||
if val.enable() {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
trace!("wait_enabled OUT OK");
|
||||
}
|
||||
async fn wait_enabled(&mut self) {
|
||||
trace!("wait_enabled OUT WAITING");
|
||||
let index = self.info.addr.index();
|
||||
poll_fn(|cx| {
|
||||
EP_OUT_WAKERS[index].register(cx.waker());
|
||||
let val = unsafe { T::dpram().ep_out_control(self.info.addr.index() - 1).read() };
|
||||
if val.enable() {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
trace!("wait_enabled OUT OK");
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, T: Instance> driver::EndpointOut for Endpoint<'d, T, Out> {
|
||||
type ReadFuture<'a> = impl Future<Output = Result<usize, EndpointError>> + 'a where Self: 'a;
|
||||
|
||||
fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> {
|
||||
async move {
|
||||
trace!("READ WAITING, buf.len() = {}", buf.len());
|
||||
let index = self.info.addr.index();
|
||||
let val = poll_fn(|cx| unsafe {
|
||||
EP_OUT_WAKERS[index].register(cx.waker());
|
||||
let val = T::dpram().ep_out_buffer_control(index).read();
|
||||
if val.available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(val)
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
let rx_len = val.length(0) as usize;
|
||||
if rx_len > buf.len() {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
async fn read(&mut self, buf: &mut [u8]) -> Result<usize, EndpointError> {
|
||||
trace!("READ WAITING, buf.len() = {}", buf.len());
|
||||
let index = self.info.addr.index();
|
||||
let val = poll_fn(|cx| unsafe {
|
||||
EP_OUT_WAKERS[index].register(cx.waker());
|
||||
let val = T::dpram().ep_out_buffer_control(index).read();
|
||||
if val.available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(val)
|
||||
}
|
||||
self.buf.read(&mut buf[..rx_len]);
|
||||
})
|
||||
.await;
|
||||
|
||||
trace!("READ OK, rx_len = {}", rx_len);
|
||||
|
||||
unsafe {
|
||||
let pid = !val.pid(0);
|
||||
T::dpram().ep_out_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, self.info.max_packet_size);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
T::dpram().ep_out_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, self.info.max_packet_size);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
Ok(rx_len)
|
||||
let rx_len = val.length(0) as usize;
|
||||
if rx_len > buf.len() {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
self.buf.read(&mut buf[..rx_len]);
|
||||
|
||||
trace!("READ OK, rx_len = {}", rx_len);
|
||||
|
||||
unsafe {
|
||||
let pid = !val.pid(0);
|
||||
T::dpram().ep_out_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, self.info.max_packet_size);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
T::dpram().ep_out_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, self.info.max_packet_size);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
Ok(rx_len)
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, T: Instance> driver::EndpointIn for Endpoint<'d, T, In> {
|
||||
type WriteFuture<'a> = impl Future<Output = Result<(), EndpointError>> + 'a where Self: 'a;
|
||||
|
||||
fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> {
|
||||
async move {
|
||||
if buf.len() > self.info.max_packet_size as usize {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
|
||||
trace!("WRITE WAITING");
|
||||
|
||||
let index = self.info.addr.index();
|
||||
let val = poll_fn(|cx| unsafe {
|
||||
EP_IN_WAKERS[index].register(cx.waker());
|
||||
let val = T::dpram().ep_in_buffer_control(index).read();
|
||||
if val.available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(val)
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
self.buf.write(buf);
|
||||
|
||||
unsafe {
|
||||
let pid = !val.pid(0);
|
||||
T::dpram().ep_in_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, buf.len() as _);
|
||||
w.set_full(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
T::dpram().ep_in_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, buf.len() as _);
|
||||
w.set_full(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
trace!("WRITE OK");
|
||||
|
||||
Ok(())
|
||||
async fn write(&mut self, buf: &[u8]) -> Result<(), EndpointError> {
|
||||
if buf.len() > self.info.max_packet_size as usize {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
|
||||
trace!("WRITE WAITING");
|
||||
|
||||
let index = self.info.addr.index();
|
||||
let val = poll_fn(|cx| unsafe {
|
||||
EP_IN_WAKERS[index].register(cx.waker());
|
||||
let val = T::dpram().ep_in_buffer_control(index).read();
|
||||
if val.available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(val)
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
self.buf.write(buf);
|
||||
|
||||
unsafe {
|
||||
let pid = !val.pid(0);
|
||||
T::dpram().ep_in_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, buf.len() as _);
|
||||
w.set_full(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
T::dpram().ep_in_buffer_control(index).write(|w| {
|
||||
w.set_pid(0, pid);
|
||||
w.set_length(0, buf.len() as _);
|
||||
w.set_full(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
trace!("WRITE OK");
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
@ -661,199 +634,183 @@ pub struct ControlPipe<'d, T: Instance> {
|
||||
}
|
||||
|
||||
impl<'d, T: Instance> driver::ControlPipe for ControlPipe<'d, T> {
|
||||
type SetupFuture<'a> = impl Future<Output = [u8;8]> + 'a where Self: 'a;
|
||||
type DataOutFuture<'a> = impl Future<Output = Result<usize, EndpointError>> + 'a where Self: 'a;
|
||||
type DataInFuture<'a> = impl Future<Output = Result<(), EndpointError>> + 'a where Self: 'a;
|
||||
type AcceptFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
|
||||
type RejectFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
|
||||
|
||||
fn max_packet_size(&self) -> usize {
|
||||
64
|
||||
}
|
||||
|
||||
fn setup<'a>(&'a mut self) -> Self::SetupFuture<'a> {
|
||||
async move {
|
||||
loop {
|
||||
trace!("SETUP read waiting");
|
||||
let regs = T::regs();
|
||||
unsafe { regs.inte().write_set(|w| w.set_setup_req(true)) };
|
||||
|
||||
poll_fn(|cx| unsafe {
|
||||
EP_OUT_WAKERS[0].register(cx.waker());
|
||||
let regs = T::regs();
|
||||
if regs.sie_status().read().setup_rec() {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
let mut buf = [0; 8];
|
||||
EndpointBuffer::<T>::new(0, 8).read(&mut buf);
|
||||
|
||||
let regs = T::regs();
|
||||
unsafe {
|
||||
regs.sie_status().write(|w| w.set_setup_rec(true));
|
||||
|
||||
// set PID to 0, so (after toggling) first DATA is PID 1
|
||||
T::dpram().ep_in_buffer_control(0).write(|w| w.set_pid(0, false));
|
||||
T::dpram().ep_out_buffer_control(0).write(|w| w.set_pid(0, false));
|
||||
}
|
||||
|
||||
trace!("SETUP read ok");
|
||||
return buf;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
fn data_out<'a>(&'a mut self, buf: &'a mut [u8], _first: bool, _last: bool) -> Self::DataOutFuture<'a> {
|
||||
async move {
|
||||
unsafe {
|
||||
let bufcontrol = T::dpram().ep_out_buffer_control(0);
|
||||
let pid = !bufcontrol.read().pid(0);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, self.max_packet_size);
|
||||
w.set_pid(0, pid);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, self.max_packet_size);
|
||||
w.set_pid(0, pid);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
trace!("control: data_out len={} first={} last={}", buf.len(), _first, _last);
|
||||
let val = poll_fn(|cx| unsafe {
|
||||
EP_OUT_WAKERS[0].register(cx.waker());
|
||||
let val = T::dpram().ep_out_buffer_control(0).read();
|
||||
if val.available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(val)
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
let rx_len = val.length(0) as _;
|
||||
trace!("control data_out DONE, rx_len = {}", rx_len);
|
||||
|
||||
if rx_len > buf.len() {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
EndpointBuffer::<T>::new(0x100, 64).read(&mut buf[..rx_len]);
|
||||
|
||||
Ok(rx_len)
|
||||
}
|
||||
}
|
||||
|
||||
fn data_in<'a>(&'a mut self, buf: &'a [u8], _first: bool, _last: bool) -> Self::DataInFuture<'a> {
|
||||
async move {
|
||||
trace!("control: data_in len={} first={} last={}", buf.len(), _first, _last);
|
||||
|
||||
if buf.len() > 64 {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
EndpointBuffer::<T>::new(0x100, 64).write(buf);
|
||||
|
||||
unsafe {
|
||||
let bufcontrol = T::dpram().ep_in_buffer_control(0);
|
||||
let pid = !bufcontrol.read().pid(0);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, buf.len() as _);
|
||||
w.set_pid(0, pid);
|
||||
w.set_full(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, buf.len() as _);
|
||||
w.set_pid(0, pid);
|
||||
w.set_full(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
async fn setup<'a>(&'a mut self) -> [u8; 8] {
|
||||
loop {
|
||||
trace!("SETUP read waiting");
|
||||
let regs = T::regs();
|
||||
unsafe { regs.inte().write_set(|w| w.set_setup_req(true)) };
|
||||
|
||||
poll_fn(|cx| unsafe {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
let bufcontrol = T::dpram().ep_in_buffer_control(0);
|
||||
if bufcontrol.read().available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
EP_OUT_WAKERS[0].register(cx.waker());
|
||||
let regs = T::regs();
|
||||
if regs.sie_status().read().setup_rec() {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
trace!("control: data_in DONE");
|
||||
|
||||
if _last {
|
||||
// prepare status phase right away.
|
||||
unsafe {
|
||||
let bufcontrol = T::dpram().ep_out_buffer_control(0);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
fn accept<'a>(&'a mut self) -> Self::AcceptFuture<'a> {
|
||||
async move {
|
||||
trace!("control: accept");
|
||||
|
||||
let bufcontrol = T::dpram().ep_in_buffer_control(0);
|
||||
unsafe {
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
w.set_full(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
w.set_full(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
// wait for completion before returning, needed so
|
||||
// set_address() doesn't happen early.
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
if unsafe { bufcontrol.read().available(0) } {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(())
|
||||
}
|
||||
})
|
||||
.await;
|
||||
}
|
||||
}
|
||||
|
||||
fn reject<'a>(&'a mut self) -> Self::RejectFuture<'a> {
|
||||
async move {
|
||||
trace!("control: reject");
|
||||
let mut buf = [0; 8];
|
||||
EndpointBuffer::<T>::new(0, 8).read(&mut buf);
|
||||
|
||||
let regs = T::regs();
|
||||
unsafe {
|
||||
regs.ep_stall_arm().write_set(|w| {
|
||||
w.set_ep0_in(true);
|
||||
w.set_ep0_out(true);
|
||||
});
|
||||
T::dpram().ep_out_buffer_control(0).write(|w| w.set_stall(true));
|
||||
T::dpram().ep_in_buffer_control(0).write(|w| w.set_stall(true));
|
||||
regs.sie_status().write(|w| w.set_setup_rec(true));
|
||||
|
||||
// set PID to 0, so (after toggling) first DATA is PID 1
|
||||
T::dpram().ep_in_buffer_control(0).write(|w| w.set_pid(0, false));
|
||||
T::dpram().ep_out_buffer_control(0).write(|w| w.set_pid(0, false));
|
||||
}
|
||||
|
||||
trace!("SETUP read ok");
|
||||
return buf;
|
||||
}
|
||||
}
|
||||
|
||||
async fn data_out(&mut self, buf: &mut [u8], first: bool, last: bool) -> Result<usize, EndpointError> {
|
||||
unsafe {
|
||||
let bufcontrol = T::dpram().ep_out_buffer_control(0);
|
||||
let pid = !bufcontrol.read().pid(0);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, self.max_packet_size);
|
||||
w.set_pid(0, pid);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, self.max_packet_size);
|
||||
w.set_pid(0, pid);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
trace!("control: data_out len={} first={} last={}", buf.len(), first, last);
|
||||
let val = poll_fn(|cx| unsafe {
|
||||
EP_OUT_WAKERS[0].register(cx.waker());
|
||||
let val = T::dpram().ep_out_buffer_control(0).read();
|
||||
if val.available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(val)
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
let rx_len = val.length(0) as _;
|
||||
trace!("control data_out DONE, rx_len = {}", rx_len);
|
||||
|
||||
if rx_len > buf.len() {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
EndpointBuffer::<T>::new(0x100, 64).read(&mut buf[..rx_len]);
|
||||
|
||||
Ok(rx_len)
|
||||
}
|
||||
|
||||
async fn data_in(&mut self, data: &[u8], first: bool, last: bool) -> Result<(), EndpointError> {
|
||||
trace!("control: data_in len={} first={} last={}", data.len(), first, last);
|
||||
|
||||
if data.len() > 64 {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
EndpointBuffer::<T>::new(0x100, 64).write(data);
|
||||
|
||||
unsafe {
|
||||
let bufcontrol = T::dpram().ep_in_buffer_control(0);
|
||||
let pid = !bufcontrol.read().pid(0);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, data.len() as _);
|
||||
w.set_pid(0, pid);
|
||||
w.set_full(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, data.len() as _);
|
||||
w.set_pid(0, pid);
|
||||
w.set_full(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
poll_fn(|cx| unsafe {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
let bufcontrol = T::dpram().ep_in_buffer_control(0);
|
||||
if bufcontrol.read().available(0) {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(())
|
||||
}
|
||||
})
|
||||
.await;
|
||||
trace!("control: data_in DONE");
|
||||
|
||||
if last {
|
||||
// prepare status phase right away.
|
||||
unsafe {
|
||||
let bufcontrol = T::dpram().ep_out_buffer_control(0);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
async fn accept(&mut self) {
|
||||
trace!("control: accept");
|
||||
|
||||
let bufcontrol = T::dpram().ep_in_buffer_control(0);
|
||||
unsafe {
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
w.set_full(0, true);
|
||||
});
|
||||
cortex_m::asm::delay(12);
|
||||
bufcontrol.write(|w| {
|
||||
w.set_length(0, 0);
|
||||
w.set_pid(0, true);
|
||||
w.set_full(0, true);
|
||||
w.set_available(0, true);
|
||||
});
|
||||
}
|
||||
|
||||
// wait for completion before returning, needed so
|
||||
// set_address() doesn't happen early.
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
if unsafe { bufcontrol.read().available(0) } {
|
||||
Poll::Pending
|
||||
} else {
|
||||
Poll::Ready(())
|
||||
}
|
||||
})
|
||||
.await;
|
||||
}
|
||||
|
||||
async fn reject(&mut self) {
|
||||
trace!("control: reject");
|
||||
|
||||
let regs = T::regs();
|
||||
unsafe {
|
||||
regs.ep_stall_arm().write_set(|w| {
|
||||
w.set_ep0_in(true);
|
||||
w.set_ep0_out(true);
|
||||
});
|
||||
T::dpram().ep_out_buffer_control(0).write(|w| w.set_stall(true));
|
||||
T::dpram().ep_in_buffer_control(0).write(|w| w.set_stall(true));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
Reference in New Issue
Block a user