Switch to async-fn-in-trait
This commit is contained in:
Dario Nieuwenhuis
@ -1,6 +1,6 @@
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#![macro_use]
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use core::future::{poll_fn, Future};
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use core::future::poll_fn;
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use core::marker::PhantomData;
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use core::sync::atomic::Ordering;
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use core::task::Poll;
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@ -429,9 +429,7 @@ pub struct Bus<'d, T: Instance> {
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}
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impl<'d, T: Instance> driver::Bus for Bus<'d, T> {
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type PollFuture<'a> = impl Future<Output = Event> + 'a where Self: 'a;
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fn poll<'a>(&'a mut self) -> Self::PollFuture<'a> {
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async fn poll(&mut self) -> Event {
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poll_fn(move |cx| unsafe {
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BUS_WAKER.register(cx.waker());
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@ -488,6 +486,7 @@ impl<'d, T: Instance> driver::Bus for Bus<'d, T> {
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return Poll::Ready(Event::PowerDetected);
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}
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})
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.await
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}
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#[inline]
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@ -598,22 +597,11 @@ impl<'d, T: Instance> driver::Bus for Bus<'d, T> {
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trace!("EPR after: {:04x}", unsafe { reg.read() }.0);
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}
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type EnableFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
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async fn enable(&mut self) {}
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async fn disable(&mut self) {}
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fn enable(&mut self) -> Self::EnableFuture<'_> {
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async move {}
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}
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type DisableFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
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fn disable(&mut self) -> Self::DisableFuture<'_> {
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async move {}
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}
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type RemoteWakeupFuture<'a> = impl Future<Output = Result<(), Unsupported>> + 'a where Self: 'a;
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fn remote_wakeup(&mut self) -> Self::RemoteWakeupFuture<'_> {
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async move { Err(Unsupported) }
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async fn remote_wakeup(&mut self) -> Result<(), Unsupported> {
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Err(Unsupported)
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}
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}
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@ -676,24 +664,20 @@ impl<'d, T: Instance> driver::Endpoint for Endpoint<'d, T, In> {
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&self.info
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}
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type WaitEnabledFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
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fn wait_enabled(&mut self) -> Self::WaitEnabledFuture<'_> {
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async move {
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trace!("wait_enabled OUT WAITING");
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let index = self.info.addr.index();
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poll_fn(|cx| {
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EP_OUT_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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if unsafe { regs.epr(index).read() }.stat_tx() == Stat::DISABLED {
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Poll::Pending
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} else {
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Poll::Ready(())
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}
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})
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.await;
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trace!("wait_enabled OUT OK");
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}
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async fn wait_enabled(&mut self) {
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trace!("wait_enabled OUT WAITING");
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let index = self.info.addr.index();
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poll_fn(|cx| {
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EP_OUT_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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if unsafe { regs.epr(index).read() }.stat_tx() == Stat::DISABLED {
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Poll::Pending
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} else {
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Poll::Ready(())
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}
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})
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.await;
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trace!("wait_enabled OUT OK");
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}
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}
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@ -702,116 +686,104 @@ impl<'d, T: Instance> driver::Endpoint for Endpoint<'d, T, Out> {
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&self.info
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}
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type WaitEnabledFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
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fn wait_enabled(&mut self) -> Self::WaitEnabledFuture<'_> {
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async move {
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trace!("wait_enabled OUT WAITING");
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let index = self.info.addr.index();
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poll_fn(|cx| {
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EP_OUT_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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if unsafe { regs.epr(index).read() }.stat_rx() == Stat::DISABLED {
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Poll::Pending
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} else {
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Poll::Ready(())
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}
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})
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.await;
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trace!("wait_enabled OUT OK");
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}
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async fn wait_enabled(&mut self) {
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trace!("wait_enabled OUT WAITING");
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let index = self.info.addr.index();
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poll_fn(|cx| {
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EP_OUT_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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if unsafe { regs.epr(index).read() }.stat_rx() == Stat::DISABLED {
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Poll::Pending
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} else {
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Poll::Ready(())
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}
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})
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.await;
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trace!("wait_enabled OUT OK");
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}
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}
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impl<'d, T: Instance> driver::EndpointOut for Endpoint<'d, T, Out> {
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type ReadFuture<'a> = impl Future<Output = Result<usize, EndpointError>> + 'a where Self: 'a;
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fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async move {
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trace!("READ WAITING, buf.len() = {}", buf.len());
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let index = self.info.addr.index();
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let stat = poll_fn(|cx| {
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EP_OUT_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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let stat = unsafe { regs.epr(index).read() }.stat_rx();
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if matches!(stat, Stat::NAK | Stat::DISABLED) {
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Poll::Ready(stat)
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} else {
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Poll::Pending
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}
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})
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.await;
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if stat == Stat::DISABLED {
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return Err(EndpointError::Disabled);
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}
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let rx_len = self.read_data(buf)?;
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async fn read(&mut self, buf: &mut [u8]) -> Result<usize, EndpointError> {
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trace!("READ WAITING, buf.len() = {}", buf.len());
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let index = self.info.addr.index();
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let stat = poll_fn(|cx| {
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EP_OUT_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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unsafe {
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regs.epr(index).write(|w| {
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w.set_ep_type(convert_type(self.info.ep_type));
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w.set_ea(self.info.addr.index() as _);
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w.set_stat_rx(Stat(Stat::NAK.0 ^ Stat::VALID.0));
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w.set_stat_tx(Stat(0));
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w.set_ctr_rx(true); // don't clear
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w.set_ctr_tx(true); // don't clear
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})
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};
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trace!("READ OK, rx_len = {}", rx_len);
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let stat = unsafe { regs.epr(index).read() }.stat_rx();
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if matches!(stat, Stat::NAK | Stat::DISABLED) {
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Poll::Ready(stat)
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} else {
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Poll::Pending
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}
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})
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.await;
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Ok(rx_len)
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if stat == Stat::DISABLED {
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return Err(EndpointError::Disabled);
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}
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let rx_len = self.read_data(buf)?;
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let regs = T::regs();
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unsafe {
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regs.epr(index).write(|w| {
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w.set_ep_type(convert_type(self.info.ep_type));
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w.set_ea(self.info.addr.index() as _);
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w.set_stat_rx(Stat(Stat::NAK.0 ^ Stat::VALID.0));
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w.set_stat_tx(Stat(0));
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w.set_ctr_rx(true); // don't clear
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w.set_ctr_tx(true); // don't clear
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})
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};
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trace!("READ OK, rx_len = {}", rx_len);
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Ok(rx_len)
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}
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}
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impl<'d, T: Instance> driver::EndpointIn for Endpoint<'d, T, In> {
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type WriteFuture<'a> = impl Future<Output = Result<(), EndpointError>> + 'a where Self: 'a;
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fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> {
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async move {
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if buf.len() > self.info.max_packet_size as usize {
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return Err(EndpointError::BufferOverflow);
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}
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let index = self.info.addr.index();
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trace!("WRITE WAITING");
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let stat = poll_fn(|cx| {
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EP_IN_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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let stat = unsafe { regs.epr(index).read() }.stat_tx();
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if matches!(stat, Stat::NAK | Stat::DISABLED) {
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Poll::Ready(stat)
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} else {
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Poll::Pending
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}
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})
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.await;
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if stat == Stat::DISABLED {
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return Err(EndpointError::Disabled);
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}
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self.write_data(buf);
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let regs = T::regs();
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unsafe {
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regs.epr(index).write(|w| {
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w.set_ep_type(convert_type(self.info.ep_type));
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w.set_ea(self.info.addr.index() as _);
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w.set_stat_tx(Stat(Stat::NAK.0 ^ Stat::VALID.0));
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w.set_stat_rx(Stat(0));
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w.set_ctr_rx(true); // don't clear
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w.set_ctr_tx(true); // don't clear
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})
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};
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trace!("WRITE OK");
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Ok(())
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async fn write(&mut self, buf: &[u8]) -> Result<(), EndpointError> {
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if buf.len() > self.info.max_packet_size as usize {
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return Err(EndpointError::BufferOverflow);
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}
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let index = self.info.addr.index();
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trace!("WRITE WAITING");
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let stat = poll_fn(|cx| {
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EP_IN_WAKERS[index].register(cx.waker());
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let regs = T::regs();
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let stat = unsafe { regs.epr(index).read() }.stat_tx();
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if matches!(stat, Stat::NAK | Stat::DISABLED) {
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Poll::Ready(stat)
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} else {
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Poll::Pending
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}
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})
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.await;
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if stat == Stat::DISABLED {
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return Err(EndpointError::Disabled);
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}
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self.write_data(buf);
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let regs = T::regs();
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unsafe {
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regs.epr(index).write(|w| {
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w.set_ep_type(convert_type(self.info.ep_type));
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w.set_ea(self.info.addr.index() as _);
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w.set_stat_tx(Stat(Stat::NAK.0 ^ Stat::VALID.0));
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w.set_stat_rx(Stat(0));
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w.set_ctr_rx(true); // don't clear
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w.set_ctr_tx(true); // don't clear
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})
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};
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trace!("WRITE OK");
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Ok(())
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}
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}
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@ -823,84 +795,16 @@ pub struct ControlPipe<'d, T: Instance> {
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}
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impl<'d, T: Instance> driver::ControlPipe for ControlPipe<'d, T> {
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type SetupFuture<'a> = impl Future<Output = [u8;8]> + 'a where Self: 'a;
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type DataOutFuture<'a> = impl Future<Output = Result<usize, EndpointError>> + 'a where Self: 'a;
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type DataInFuture<'a> = impl Future<Output = Result<(), EndpointError>> + 'a where Self: 'a;
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type AcceptFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
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type RejectFuture<'a> = impl Future<Output = ()> + 'a where Self: 'a;
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fn max_packet_size(&self) -> usize {
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usize::from(self.max_packet_size)
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}
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fn setup<'a>(&'a mut self) -> Self::SetupFuture<'a> {
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async move {
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loop {
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trace!("SETUP read waiting");
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poll_fn(|cx| {
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EP_OUT_WAKERS[0].register(cx.waker());
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if EP0_SETUP.load(Ordering::Relaxed) {
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Poll::Ready(())
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} else {
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Poll::Pending
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}
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})
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.await;
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let mut buf = [0; 8];
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let rx_len = self.ep_out.read_data(&mut buf);
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if rx_len != Ok(8) {
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trace!("SETUP read failed: {:?}", rx_len);
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continue;
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}
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EP0_SETUP.store(false, Ordering::Relaxed);
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trace!("SETUP read ok");
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return buf;
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}
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}
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}
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fn data_out<'a>(&'a mut self, buf: &'a mut [u8], first: bool, last: bool) -> Self::DataOutFuture<'a> {
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async move {
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let regs = T::regs();
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// When a SETUP is received, Stat/Stat is set to NAK.
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// On first transfer, we must set Stat=VALID, to get the OUT data stage.
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// We want Stat=STALL so that the host gets a STALL if it switches to the status
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// stage too soon, except in the last transfer we set Stat=NAK so that it waits
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// for the status stage, which we will ACK or STALL later.
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if first || last {
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let mut stat_rx = 0;
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let mut stat_tx = 0;
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if first {
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// change NAK -> VALID
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stat_rx ^= Stat::NAK.0 ^ Stat::VALID.0;
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stat_tx ^= Stat::NAK.0 ^ Stat::STALL.0;
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}
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if last {
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// change STALL -> VALID
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stat_tx ^= Stat::STALL.0 ^ Stat::NAK.0;
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}
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// Note: if this is the first AND last transfer, the above effectively
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// changes stat_tx like NAK -> NAK, so noop.
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unsafe {
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regs.epr(0).write(|w| {
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w.set_ep_type(EpType::CONTROL);
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w.set_stat_rx(Stat(stat_rx));
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w.set_stat_tx(Stat(stat_tx));
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w.set_ctr_rx(true); // don't clear
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w.set_ctr_tx(true); // don't clear
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})
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}
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}
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trace!("data_out WAITING, buf.len() = {}", buf.len());
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async fn setup<'a>(&'a mut self) -> [u8; 8] {
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loop {
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trace!("SETUP read waiting");
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poll_fn(|cx| {
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EP_OUT_WAKERS[0].register(cx.waker());
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let regs = T::regs();
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if unsafe { regs.epr(0).read() }.stat_rx() == Stat::NAK {
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if EP0_SETUP.load(Ordering::Relaxed) {
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Poll::Ready(())
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} else {
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Poll::Pending
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@ -908,157 +812,209 @@ impl<'d, T: Instance> driver::ControlPipe for ControlPipe<'d, T> {
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})
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.await;
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if EP0_SETUP.load(Ordering::Relaxed) {
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trace!("received another SETUP, aborting data_out.");
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return Err(EndpointError::Disabled);
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let mut buf = [0; 8];
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let rx_len = self.ep_out.read_data(&mut buf);
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if rx_len != Ok(8) {
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trace!("SETUP read failed: {:?}", rx_len);
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continue;
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}
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let rx_len = self.ep_out.read_data(buf)?;
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EP0_SETUP.store(false, Ordering::Relaxed);
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trace!("SETUP read ok");
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return buf;
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}
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}
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async fn data_out(&mut self, buf: &mut [u8], first: bool, last: bool) -> Result<usize, EndpointError> {
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let regs = T::regs();
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// When a SETUP is received, Stat/Stat is set to NAK.
|
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// On first transfer, we must set Stat=VALID, to get the OUT data stage.
|
||||
// We want Stat=STALL so that the host gets a STALL if it switches to the status
|
||||
// stage too soon, except in the last transfer we set Stat=NAK so that it waits
|
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// for the status stage, which we will ACK or STALL later.
|
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if first || last {
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let mut stat_rx = 0;
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let mut stat_tx = 0;
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if first {
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// change NAK -> VALID
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stat_rx ^= Stat::NAK.0 ^ Stat::VALID.0;
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stat_tx ^= Stat::NAK.0 ^ Stat::STALL.0;
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}
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if last {
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// change STALL -> VALID
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stat_tx ^= Stat::STALL.0 ^ Stat::NAK.0;
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}
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// Note: if this is the first AND last transfer, the above effectively
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// changes stat_tx like NAK -> NAK, so noop.
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unsafe {
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regs.epr(0).write(|w| {
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w.set_ep_type(EpType::CONTROL);
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w.set_stat_rx(Stat(match last {
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// If last, set STAT_RX=STALL.
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true => Stat::NAK.0 ^ Stat::STALL.0,
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// Otherwise, set STAT_RX=VALID, to allow the host to send the next packet.
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false => Stat::NAK.0 ^ Stat::VALID.0,
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}));
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w.set_stat_rx(Stat(stat_rx));
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w.set_stat_tx(Stat(stat_tx));
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w.set_ctr_rx(true); // don't clear
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w.set_ctr_tx(true); // don't clear
|
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})
|
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};
|
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Ok(rx_len)
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}
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}
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trace!("data_out WAITING, buf.len() = {}", buf.len());
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||||
poll_fn(|cx| {
|
||||
EP_OUT_WAKERS[0].register(cx.waker());
|
||||
let regs = T::regs();
|
||||
if unsafe { regs.epr(0).read() }.stat_rx() == Stat::NAK {
|
||||
Poll::Ready(())
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||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
if EP0_SETUP.load(Ordering::Relaxed) {
|
||||
trace!("received another SETUP, aborting data_out.");
|
||||
return Err(EndpointError::Disabled);
|
||||
}
|
||||
|
||||
let rx_len = self.ep_out.read_data(buf)?;
|
||||
|
||||
unsafe {
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_rx(Stat(match last {
|
||||
// If last, set STAT_RX=STALL.
|
||||
true => Stat::NAK.0 ^ Stat::STALL.0,
|
||||
// Otherwise, set STAT_RX=VALID, to allow the host to send the next packet.
|
||||
false => Stat::NAK.0 ^ Stat::VALID.0,
|
||||
}));
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
})
|
||||
};
|
||||
|
||||
Ok(rx_len)
|
||||
}
|
||||
|
||||
fn data_in<'a>(&'a mut self, buf: &'a [u8], first: bool, last: bool) -> Self::DataInFuture<'a> {
|
||||
async move {
|
||||
trace!("control: data_in");
|
||||
async fn data_in(&mut self, data: &[u8], first: bool, last: bool) -> Result<(), EndpointError> {
|
||||
trace!("control: data_in");
|
||||
|
||||
if buf.len() > self.ep_in.info.max_packet_size as usize {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
if data.len() > self.ep_in.info.max_packet_size as usize {
|
||||
return Err(EndpointError::BufferOverflow);
|
||||
}
|
||||
|
||||
let regs = T::regs();
|
||||
|
||||
// When a SETUP is received, Stat is set to NAK.
|
||||
// We want it to be STALL in non-last transfers.
|
||||
// We want it to be VALID in last transfer, so the HW does the status stage.
|
||||
if first || last {
|
||||
let mut stat_rx = 0;
|
||||
if first {
|
||||
// change NAK -> STALL
|
||||
stat_rx ^= Stat::NAK.0 ^ Stat::STALL.0;
|
||||
}
|
||||
|
||||
let regs = T::regs();
|
||||
|
||||
// When a SETUP is received, Stat is set to NAK.
|
||||
// We want it to be STALL in non-last transfers.
|
||||
// We want it to be VALID in last transfer, so the HW does the status stage.
|
||||
if first || last {
|
||||
let mut stat_rx = 0;
|
||||
if first {
|
||||
// change NAK -> STALL
|
||||
stat_rx ^= Stat::NAK.0 ^ Stat::STALL.0;
|
||||
}
|
||||
if last {
|
||||
// change STALL -> VALID
|
||||
stat_rx ^= Stat::STALL.0 ^ Stat::VALID.0;
|
||||
}
|
||||
// Note: if this is the first AND last transfer, the above effectively
|
||||
// does a change of NAK -> VALID.
|
||||
unsafe {
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_rx(Stat(stat_rx));
|
||||
w.set_ep_kind(last); // set OUT_STATUS if last.
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
})
|
||||
}
|
||||
if last {
|
||||
// change STALL -> VALID
|
||||
stat_rx ^= Stat::STALL.0 ^ Stat::VALID.0;
|
||||
}
|
||||
|
||||
trace!("WRITE WAITING");
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
EP_OUT_WAKERS[0].register(cx.waker());
|
||||
let regs = T::regs();
|
||||
if unsafe { regs.epr(0).read() }.stat_tx() == Stat::NAK {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
if EP0_SETUP.load(Ordering::Relaxed) {
|
||||
trace!("received another SETUP, aborting data_in.");
|
||||
return Err(EndpointError::Disabled);
|
||||
}
|
||||
|
||||
self.ep_in.write_data(buf);
|
||||
|
||||
let regs = T::regs();
|
||||
// Note: if this is the first AND last transfer, the above effectively
|
||||
// does a change of NAK -> VALID.
|
||||
unsafe {
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_tx(Stat(Stat::NAK.0 ^ Stat::VALID.0));
|
||||
w.set_stat_rx(Stat(stat_rx));
|
||||
w.set_ep_kind(last); // set OUT_STATUS if last.
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
})
|
||||
};
|
||||
|
||||
trace!("WRITE OK");
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
fn accept<'a>(&'a mut self) -> Self::AcceptFuture<'a> {
|
||||
async move {
|
||||
let regs = T::regs();
|
||||
trace!("control: accept");
|
||||
|
||||
self.ep_in.write_data(&[]);
|
||||
|
||||
// Set OUT=stall, IN=accept
|
||||
unsafe {
|
||||
let epr = regs.epr(0).read();
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_rx(Stat(epr.stat_rx().0 ^ Stat::STALL.0));
|
||||
w.set_stat_tx(Stat(epr.stat_tx().0 ^ Stat::VALID.0));
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
});
|
||||
}
|
||||
trace!("control: accept WAITING");
|
||||
}
|
||||
|
||||
// Wait is needed, so that we don't set the address too soon, breaking the status stage.
|
||||
// (embassy-usb sets the address after accept() returns)
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
let regs = T::regs();
|
||||
if unsafe { regs.epr(0).read() }.stat_tx() == Stat::NAK {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
trace!("WRITE WAITING");
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
EP_OUT_WAKERS[0].register(cx.waker());
|
||||
let regs = T::regs();
|
||||
if unsafe { regs.epr(0).read() }.stat_tx() == Stat::NAK {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
if EP0_SETUP.load(Ordering::Relaxed) {
|
||||
trace!("received another SETUP, aborting data_in.");
|
||||
return Err(EndpointError::Disabled);
|
||||
}
|
||||
|
||||
self.ep_in.write_data(data);
|
||||
|
||||
let regs = T::regs();
|
||||
unsafe {
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_tx(Stat(Stat::NAK.0 ^ Stat::VALID.0));
|
||||
w.set_ep_kind(last); // set OUT_STATUS if last.
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
})
|
||||
.await;
|
||||
};
|
||||
|
||||
trace!("control: accept OK");
|
||||
}
|
||||
trace!("WRITE OK");
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn reject<'a>(&'a mut self) -> Self::RejectFuture<'a> {
|
||||
async move {
|
||||
let regs = T::regs();
|
||||
trace!("control: reject");
|
||||
async fn accept(&mut self) {
|
||||
let regs = T::regs();
|
||||
trace!("control: accept");
|
||||
|
||||
// Set IN+OUT to stall
|
||||
unsafe {
|
||||
let epr = regs.epr(0).read();
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_rx(Stat(epr.stat_rx().0 ^ Stat::STALL.0));
|
||||
w.set_stat_tx(Stat(epr.stat_tx().0 ^ Stat::STALL.0));
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
});
|
||||
self.ep_in.write_data(&[]);
|
||||
|
||||
// Set OUT=stall, IN=accept
|
||||
unsafe {
|
||||
let epr = regs.epr(0).read();
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_rx(Stat(epr.stat_rx().0 ^ Stat::STALL.0));
|
||||
w.set_stat_tx(Stat(epr.stat_tx().0 ^ Stat::VALID.0));
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
});
|
||||
}
|
||||
trace!("control: accept WAITING");
|
||||
|
||||
// Wait is needed, so that we don't set the address too soon, breaking the status stage.
|
||||
// (embassy-usb sets the address after accept() returns)
|
||||
poll_fn(|cx| {
|
||||
EP_IN_WAKERS[0].register(cx.waker());
|
||||
let regs = T::regs();
|
||||
if unsafe { regs.epr(0).read() }.stat_tx() == Stat::NAK {
|
||||
Poll::Ready(())
|
||||
} else {
|
||||
Poll::Pending
|
||||
}
|
||||
})
|
||||
.await;
|
||||
|
||||
trace!("control: accept OK");
|
||||
}
|
||||
|
||||
async fn reject(&mut self) {
|
||||
let regs = T::regs();
|
||||
trace!("control: reject");
|
||||
|
||||
// Set IN+OUT to stall
|
||||
unsafe {
|
||||
let epr = regs.epr(0).read();
|
||||
regs.epr(0).write(|w| {
|
||||
w.set_ep_type(EpType::CONTROL);
|
||||
w.set_stat_rx(Stat(epr.stat_rx().0 ^ Stat::STALL.0));
|
||||
w.set_stat_tx(Stat(epr.stat_tx().0 ^ Stat::STALL.0));
|
||||
w.set_ctr_rx(true); // don't clear
|
||||
w.set_ctr_tx(true); // don't clear
|
||||
});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user